使用脈波寬度調變與磁滯電壓平方控制技術之1V以下直流-直流降壓轉換器

Sub-1V DC-DC Buck Converters using PWM and Hysteresis-V2 Control Techniques

盧銘祥(Ming-Xiang Lu)

指導教授 ： 黃育賢 ； 陳建中

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2010年)

摘要

本論文第一部份為全數位元件組成之直流-直流降壓轉換器設計，提出數位元件控制的切換式電壓調整器，利用數位電路對雜訊的敏感度低、對溫度和製程變異的影響度低、功率消耗較低等優點，並降低電路功率消耗，延長電池使用時間，而控制電路簡單也為電路一大優點，運算放大器設計只使用八個反相器元件，採用脈波寬度調變技術。全數位元件組成之降壓轉換器電路使用台灣積體電路公司零點一八微米一層多晶矽六層金屬互補式金屬氧化物半導體製程來實現，晶片面積為0.91 x 1.06 mm2 (含PADs)。
本論文第二部份為磁滯電壓平方控制降壓轉換器設計，使用雙重電壓迴授路徑，取代電流感測電路，簡化電路設計的複雜性及提高準確度，運算放大器使用全數位式元件組合而成，對溫度與製程變異影響度低，相較於傳統電壓平方架構，無須使用大等效串聯電阻的電容，進而提昇電路整體效率，磁滯電壓平方控制降壓轉換器電路使用台灣積體電路公司零點一八微米一層多晶矽六層金屬互補式金屬氧化物半導體製程來實現，晶片面積分別為1.23 x 1.34 mm2 (含PADs)。

關鍵字

直流對直流轉換器 ； 脈波寬度調變 ； 磁滯電壓平方 ； 降壓轉換器

並列摘要

The first part of this thesis is the DC-DC buck converter using pulse width modulation (PWM) control techniques. The buck converter uses operator amplifier with all digital components. The buck converter includes a closed-loop digital controlled regulator to have some advantages of low sensitivity to noise, low sensitivity to temperature, low sensitivity to process variations, and low power consumption. The buck converter improves the efficiency and extends battery life. The advantage of control circuit, which only uses eight inverters, is simple. The buck converter of PWM voltage control circuit is implemented with a TSMC 0.18um CMOS 1P6M process, and the chip area is 0.91 × 1.06 mm2 (with PADs).
The second part of this thesis introduces the design of hysteresis-V2 buck converter. The double voltage feedback signals have replaced current sensing circuit. The hysteresis-V2 control simplifies the complex circuit, and upgrading the accuracy. The error amplifier constitutes by all digital components, and it has advantage of low sensitivity to process variations. The hysteresis-V2 control does not use large equivalent series resistance (ESR) capacitors with convention schemes to increase the total power efficiency. The buck converter has high efficiency and fast transient response. The buck converter of hysteresis-V2 control circuit is implemented with a TSMC 0.18 m CMOS 1P6M process, and the chip area is 1.23 × 1.34 mm2 (with PADs).

並列關鍵字

dc-dc converter ； pulse width modulation ； hysteresis V2 ； buck converter

參考文獻

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