摘要
本論文使用串聯諧振網路將能量以電磁耦合原理傳遞，透過無線方式將能量傳至接收晶片以達到無探針式測試。 無探針式測試系統可分為發射端與接收晶片兩個部分，在發射端部分使用E類功率放大器將能量放大以及匹配網路使傳能效率最佳化，並使用積體電路U2270B將接收晶片回傳資料還原；在接收系統晶片部分使用TSMC 0.18μm 1P6M CMOS製程製作，系統晶片包含整流器、低壓降線性穩壓器、振幅偏移解調器、負載偏移調變器、八位元連續漸近式類比數位轉換器以及邏輯控制器。 無探針式測試系統可測試類比與數位訊號，使用單一頻率作為通道完成半雙工資料傳輸，資料使用前四位元檢測，中間八位元傳送訊號，後面四位元結束位元封包方式傳送，並利用邏輯控制器判別發射訊號是否傳送正確測試指令達到致能功能。 本論文現階段以測試一個半加器為雛型，經量測結果得知此方法可行性極高，未來可應用於大型系統晶片測試，使晶圓測試成本大幅度降低。
並列摘要
This thesis is the basic principle of electromagnetic coupling, using a series resonant network to transfer energy, the energy transfer wirelessly to the receiver chip to achieve probeless testing. The system can be divided into two parts: the transmitter and receiver chip. In transmitter part, a Class-E power amplifier which enlarge the energy and matching network makes the energy transfer efficiency optimization. Data restore uses integrated circuit U2270B to transfer chip information; The chip is fabricated by TSMC 0.18μm 1P6M CMOS technology, including the rectifier, the low-dropout voltage regulator, the amplitude-shift keying demodulator, the load-shift keying modulator, the 8-bit successive-approximation-register analog-to-digital converters and the logic controller. The system can test both analog and digital signals by using a single frequency channel to complete the half-duplex data transmission. Transferred data is packaged as the first four parity check bits, the middle of eight main signal bits and the last four stop bits. The logic controller to distinguish the emission signal whether or not send a test command to achieve enable function. At the present stage, this thesis measures a half adder as prototype, by measurement results show that the feasibility of this method is high. In the future, it can be application in larger chip testing. Via this method, the cost of wafer probing will be decreasing.