頻率合成器之自動校準電路設計

An Automatic Calibration Circuit Design For Frequency Synthesizers

麥威國(Wei-Kuo Mai)

指導教授 ： 金雅琴

國立清華大學/電機資訊學院/電子工程研究所/碩士(2009年)

摘要

過去的校準方式，往往需要工廠的測試。每個待測元件，需經過繁複的測試程序, 耗費許多時間與資源才可以完成。為了減少成本，開始的有自動校準電路的發展。但是目前常見的自動校準電路，通常需要額外的電路，以作為校正的功能，並且這些電路大多以類比的方式呈現，如此也提高元件本身的成本。
頻率合成器(Frequency Synthesizer)是通訊系統中常見的元件，用來提供精準的載波。它工作在高頻，並且很容易受到因生產時，或是元件本身的誤差，而影響到其輸出的頻率。本論文設計一自動地校準電路，以提供頻率合成器獲取精確的輸出，其中的電壓控制振盪器(VCO)是最重要的元件，本文中利用數位動態偵測的方式，來校準電壓控制振盪器的工作曲線。VCO有幾個輸入電壓對頻率的曲線，並容易受製程與溫度的影響，如果VCO輸出的頻率不是在預期的正常操作範圍之內，此校準電路係使用數位自動控制，並會提供校準訊號，使VCO 被調整到正確的中心頻率，快速且有效率地選擇其適當工作的曲線。
筆者藉由比較目前各種不同架構的做法，探討其中之優缺點，並提出新的架構。不同於過去的方式，而是使用數位電路的技巧，來完成自動校正的工作。並且將校準的功能，與原本頻率合成器的功能做結合，不需要電路切換的工作，如此可有效提高其效能，並且降低成本。論文中使用混合數位與類比電路(Mixed-signal)設計工具加以模擬，並用FPGA實作的方式來驗證其可行性。

關鍵字

自動校準 ； 頻率合成器

並列摘要

The traditional calibration method often needs the factory test. Each device under test (DUT) has to pass through complicated test procedure, and costs time and resources. Several automatic calibration techniques have been developed to solve this problem. But present calibration methods usually need extra circuits, and these circuits mostly require analog approach, which increase the device cost.
The Voltage Controlled Oscillator (VCO) is an essential component in frequency synthesizers (FS). Fabricated by deep submicron processes, the VCOs exhibit characteristics that are highly dependent on the process variations, such as resistor, capacitor and transistor threshold voltages. For this reason, calibration systems and techniques for frequency synthesizers are needed to provide a precise setting of the VCO’s operating curve. Based on the proposed method, the calibrating signals are generated for adjusting its center frequency and gain during power up or when responding to an initiation signal.
The proposed automatic calibration circuit uses digital approach to determine the final operating curves. This is done by selecting the switches associated with the coarse tuning apparatus until an appropriate curve is obtained. The proposed technique has been successfully demonstrated in a prototype system, which shows fast and accurate auto-trimming operation.

並列關鍵字

Calibration ； Frequency Synthesizer

參考文獻

[1] Adem Aktas and Mohammed Ismail, “CMOS PLL Calibration Techniques,” IEEE Circuits & Devices Magazine, September/October 2004

[3] Tsung-Hsien Lin and William J. Kaiser “A 900-MHz 2.5-mA CMOS Frequency Synthesizer with an Automatic SC Tuning Loop,” IEEE Journal of Solid-State Circuits, VOL. 36, NO. 3, March 2001

[4] Daniel R. McMahill and Charles G. Sodini, “Automatic Calibration of Modulated Frequency Synthesizers,” IEEE Transactions on Circuits and System, VOL. 49, NO. 5, pp. 301-311, May 2002

[5] M. Perrot, et al, “A 27-mW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-Mb/s GFSK Modulation,” IEEE Journal of Solid-State Circuits (JSSC) , pp. 2048-60, Dec. 1997

[6] Y. Tang, A. Aktas, M. Ismail, and S. Bibyk, “A fully integrated dual-mode frequency synthesizer for GSM and wideband CDMA in 0.5 μm CMOS,” in Proc. MWSCAS, vol. 2, pp.866,869, 2001.