- 學位論文
一個使用每週期二位元與數位斜坡轉換之十二位元兩百百萬頻率時序交錯之混合式連續漸進逼近式類比數位轉換器
A 12bit 200MS/s Time-interleaved Hybrid-SAR ADC with Two-bit-per-cycle and Digital-slope Conversions
延伸閱讀
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- 陳柏憲（2021）。每秒一千萬次採樣、十二有效位元之自我修正連續漸進式類比數位轉換器〔碩士論文，國立清華大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0016-0203202211554134
- Lin, W. T. (2013). 利用全輸入電壓範圍數位校正電路之十二位元連續漸進式類比數位轉換器 [master's thesis, National Tsing Hua University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0016-2511201311374086
- Chen, Y. C. (2011). 使用數位校正電路之十二位元連續漸進式類比數位轉換器 [master's thesis, National Tsing Hua University]. Airiti Library. https://doi.org/10.6843/NTHU.2011.00133
- Tsai, C. H. (2013). A Single-Channel 6-bit 800MS/s Two-Step SAR ADC [master's thesis, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU.2013.10825