雙延遲路徑環形壓控振盪器之設計與分析

在現今這個科技迅速發展的時代，通訊系統的進步也是以驚人的速度進行。而在通訊系統中的訊號接收與發射端需要一精確且穩定的振盪訊號來和欲發射的訊號以及接收的訊號進行混波，因此產生本地震盪訊號的壓控振盪器即扮演著十分重要的角色。本篇論文針對一個同時結合對稱負載(Symmetric Load)、負時滯電路(Negative Skewed Delay)及PMOS構成的交叉耦合對(Cross-Coupled Pair)所設計的雙迴路環形壓控振盪器(Voltage Controlled Ring Oscillator with Dual Delay Paths)進行整理及分析。電路架構由三級差動放大對所構成，藉由使用對稱負載做為可變負載增加電路的線性度將可降低來自電源供應端的雜訊，加入負時滯電路架構也將加速振盪器的振盪速度，同時在設計與分析的章節中利用震盪頻率的公式推導進行驗證。本環形壓控振盪器以台灣積體電路公司(TSMC)之1P6M 0.18μm RF-CMOS製程去實現，共使用33顆RF-CMOS電晶體，其中24顆為RF-PMOS而其餘9顆為RF-NMOS。量測結果之頻率調整範圍由2.77GHz到4.55GHz，其中頻率調整百分比為49%。同時相位雜訊在中心頻率2.77GHz之1MHz偏移處為-92dBc/Hz；在中心頻率4.55GHz之1MHz偏移處為-96dBc/Hz。

關鍵字

環型壓控震盪器；雙延遲路徑

並列摘要

Nowadays, the communication system was a rapidly developed technology. At the architecture of transceiver and receiver, we need a precise and stable oscillated signal to mix with the radio frequency signal. Thus, the voltage controlled ring oscillator used to produce the local oscillated signal played an important role. This paper presented an analysis on a voltage controlled ring oscillator with dual delay paths with symmetric load、negative skewed delay and PMOS cross coupled pair. The circuit was a three-stage differential ring oscillator, with symmetric load as a variable resistor to improve the linearity of circuit will reduce the noise from power supply. This circuit using negative skewed delay to accelerated the oscillation frequency, at the chapter of analysis will prove it with the equation of oscillation frequency. The VCRO was implemented using a TSMC 0.18 μm RF-CMOS process. All devices in this circuit was 33 RF-MOS transistor, 24 of them were RF-PMOS and rest of them were RF-NOMS. Measurement results demonstrate that the VCRO achieves a frequency tuning range of 2.77 GHZ to 4.55 GHz, the frequency tuning percentage was 49%. The measured phase noise at 1 MHz offset from the carrier frequency 4.55 GHz is -96 dBc/Hz. The VCRO occupies an active area of 0.048 mm2 and consumes 50.76mW for 4.55 GHz carrier frequency from a 1.8 V power supply.

並列關鍵字

Voltage-Controlled Ring Oscillator ； Dual delay paths

參考文獻

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1273–1282,Dec. 1993.

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雙延遲路徑環形壓控振盪器之設計與分析

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