植入式微刺激器低功率接收端介面

Low power receiver interface for implantable microstimulator

陳季廷(Ji-Ting Chen)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2006年)

https://doi.org/10.6840/cycu200600180

摘要

摘 要
植入式微刺激器分為使用內部電池IPG(Internal Pulse Generator)或使用線圈耦合方法RF(Radio Frequency)達到能量提供，本研究為電源方法與電路之設計內容，配合可充電式微刺激器之架構開發，結合RF與IPG方式兩者之優點，透過線圈能量無需更換電池。在架構中電源方面降低微刺激器的功耗，並由外部電源提供於內部部份電路啟動。在電路設計方面改良，分為兩部份：第一部份將資料檢波採用簡易低佈局面積之低電容值(2pF)提供高通效果，並對所檢波後穩定資料萃取出曼徹司特編碼中所包含的資料與時脈；第二部份電源穩壓器設計高電源供應抑制比(Power Supply Rejection Ratio, PSRR)電路，減少外部能量收集後所造成的干擾，提供內部電路穩定的電源供應準位，並將此電源供應準位提供於後級電路以達到穩定與低電壓供應低功率電路的實現。
此外架構類比於RF植入式微電刺激器系統發射模組做為系統量測，而植入式系統內部接收端線路將採用國家晶片系統設計中心TSMC 0.35 UM Mixed-Signal 2P4M Polycide 3.3/5V製程下線製作完成，其系統消耗晶片實測結果，總功率少於0.35mW，可完成充電式植入式刺激器之初步能源、時脈與資料的傳遞。

關鍵字

供應電壓抑制比 ； 穩壓電路 ； 微刺激器

並列摘要

Abstract
The purposed of this article provide an improvement of micro-stimulator. Implantable microstimulator is implementation by IPG (Internal pulse generator) which power by battery or RF (Radio Frequency) which power by coil. The circuits are designed with rechargeable concept by combining RF and IPG. In our circuits, not only lower power consumption in the power recovery stage but also provide energy to satisfy inner part of non-stimulator such as digital building block. As the aspect of circuit improvement, we adopt a capacitor as high pass filter for low layout area consideration and decode the signal by using manchester decoder. We also design a unpack process to recovery the control data. Besides, we design a high PSRR (Power Supply Rejection Ration) core voltage reference to reduce ripple noise from outside. The stable voltage reference is connected to a voltage regulator to supply other stage current and voltage. The total circuits are designed with low power consideration.
Furthermore we structure a RF implantable microstimulator energy transmitter module board to verify the integrated circuit. The implantable microstimulator inner power and data receiver circuits are fabricated in a 0.35um 2P4M CMOS technology in CIC (Chip Implement Center). The total system power consumption is less than 0.35mW.

並列關鍵字

PSRR ； Regulator ； Micro-stimulator

參考文獻

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