利用蛇形結構降低平行耦合微帶線之遠端串音雜訊

近年來隨著高速數位化通訊時代的來臨，高頻化電子產品、電腦高速訊號硬體和軟體的快速發展以及工作頻率增加與頻寬要求變高與積體電路快速發展，因此對於訊號的工作頻率與頻寬要求越來越高。當電信問題受到傳輸速度的提升伴隨而來，加上互連元件產品如連接器、線纜或印刷電路板縮小化使電路的佈局越來越緊密，造成訊號完整性(Signal Integrity, SI)、電磁干擾(Electromagnetic Interference, EMI)、電磁相容(Electromagnetic Compatibility, EMC)或是電源完整性(Power Integrity, PI)等問題，因此這樣的議題逐漸被重視。因此本論文將探討在微帶線結構中利用蛇形繞線方式來降低遠端串音雜訊，此方法是利用增加電容耦合來降低遠端串音雜訊，可以通過電容耦合比等於電感耦合比把遠端串音雜訊降到零。本文主要是改善原始蛇形線結構，在相同的折數下，改善後蛇形線結構的遠端串音雜訊比原始的遠端串音雜訊減少的還要多，眼圖的Jitter改善效果也比原始蛇形線結構來的更好。

關鍵字

遠端串音雜訊

並列摘要

In the recent years, As the clock frequencies and data transmission rates in semiconductor systems steadily increase beyond the GHz range, the timing control of high-speed clocks and digital data, propagating signal traces on printed circuit boards(PCB), is becoming a critical issue in a high-speed digital circuit design. In high-speed data links, cables and connectors are required to transmit high speed signals between the various electronic devices or PCBs. This may cause SI(signal integrity)、electromagnetic interference (EMI) 、Electromagnetic Compatibility,(EMC) and power integrity, and other effects. Hence, during the design of state-of-the-art electronic systems, reducing the noise induced by trace is crucial. This paper proposes a new structure to reduce the far-end crosstalk of serpentine delay line on the microstrip line structure. For far-end noise We can use it to reduce dialogue to a minimum if capacitor couple ratio is equal to Inductance couple ratio. For the same of section, the reduction of far-end noise associated with the improve structure after, mission becoming important for keeping good signal quality and reducing the far-end crosstalk and improving jitter noise.

並列關鍵字

Far-end Crosstalk

參考文獻

[1] Kyoungho Lee, Hae-Kang Jung, “Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces,” in IEEE Transactions on Advanced Packaging, vol. 33, no. 2, pp. 552-558, May 2010.

[2] K. Lee et al., “A serpentine guard trace to reduce the far-end crosstalk voltage and the crosstalk induced timing jitter of parallel microstrip lines,” IEEE Trans. Adv. Packag., vol. 31, no. 4, pp. 809–817, Nov. 2008.

[3] Y. S. Sohn et al., “Empirical equations on electrical parameters of coupled microstrip lines for crosstalk estimation in printed circuit board,” IEEE Trans. Adv. Packag., vol. 24, no. 4, pp. 521–527, Nov. 2001.

[4] S. K. Lee et al., “FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel links,” Electron. Lett., vol. 44, no. 4, pp. 272–273, Feb. 2008.

[5] I. Novak, B. Eged, and L. Hatvani, “Measurement by vector-network analyzer and simulation of crosstalk reduction on printed circuit boards with additional center traces,” in Instrum. Measurement Technol. Control Conf., Irvine, CA, May 1993, pp. 269–274.

國際替代計量

利用蛇形結構降低平行耦合微帶線之遠端串音雜訊

未授權

主題瀏覽