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  • 學位論文

單邊非重疊離子佈植元件之電子捕陷能量分析

Characterization of electron trap energy spectrum in single-ended non-overlapped implantation devices

指導教授 : 鄭湘原

摘要


在半導體產業中,非揮發性記憶體的應用愈來與廣泛,其市場對半導體記憶元件開發來說,元件的資料保存度需要最少十年的儲存能力。因此在本論以單邊非重疊離子植入式(single-side non-overlapped implantation, SNOI)記憶元件之介面特性與介面缺陷能量分析作為研究方向,此元件係利用熱載子效應進行電荷的注入,並以側壁區作為資料儲存區域。針對熱載子效應造成元件介面缺陷的變化,並透過改良的二階電荷幫浦法技術(Two-level Charge Pumping Technique)與三皆電荷幫浦技術(Three-level Charge Pumping Technique)進行缺陷密度與其能量位置分佈的分析量測,藉此進行元件介面之研究。最後由電荷幫浦技術測得能量分佈在寫入過程會增加2.5x1010 (cm-2eV-1)的缺陷密度,且缺陷能量會向較淺的位置平移60meV.

並列摘要


In the semiconductor industry, non-volatile memory (NVM) applications are extensive, and the relative markets have been well developed. For developing semiconductor NVM devices, the effect and improvement of reliability characteristics play important roles. This work is aimed at investigating the surface states and energy profile of single-side non-overlapped implantation (SNOI) MOSFETs which use the drain-side spacer region to store charges by hot carrier injection. To extract the interface state of energy distribution and trap density, we used the two-level charge pumping method and three-level charge pumping methods for investigating SNOI devices. Based on the charge pumping measurement results, the interface trap and trap energy can be found. Finally, by using the charge pumping method, the energy distribution will shift about 60meV to the shallow site, and the interface trap density will increase to about 2.5x1010 (cm-2eV-1) after the program process.

參考文獻


Chapter 1
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