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  • 學位論文

W 頻帶低雜訊放大器與功率放大器之研究

Study of W-Band Low Noise Amplifier and Power Amplifier

指導教授 : 林佑昇

摘要


本論文主要以台積電90奈米CMOS製程來實現W頻帶低雜訊放大器與W頻帶功率放大器。研究主題由以下三個部份構成: 第一部份為應用於W頻帶系統之77~81 GHz低雜訊放大器。為了縮小晶片面積,我們將電路設計成2級串接放大器,以節省成本,此架構的第一級為共源級放大電路,第二級的架構中我們使用一個串疊放大電路來加強訊號的增益,然後在輸入和輸出端使用T型匹配以得到較好的增益、S參數表現和較低的雜訊。最後在VDD和VGS端加上bypass電容使整體電路更為穩定。 第二部分,我們利用90奈米CMOS製程設計了一顆應用在79GHz之高功率附加效率的功率放大器。在電路架構方面,第一級為基本的疊接架構,第二級為基本的共源級(CS)架構來實現,主要是因為疊接架構能得到較好的增益以及改善反隔離度,線性度與功率消耗都差於共源級的架構,因此,為了取得數據上的平衡,才會第一級使用疊接的架構第二級使用共源級的架構。最後一級則是採用了功率等分(power splitting/combining)的架構來以達到輸出功率以及功率附加效率的提升。 第三部分為應用於 94 GHz氣象雷達系統的低雜訊放大器。由於Mos在越高頻的時候寄生電容會越大,而使的增益降低,為了獲得較高的增益,架構上我們使用一級疊接和一級串疊以及做中間級之間的共軛匹配。利用台積電 90 nm CMOS製程實現高增益、超寬頻、低的雜訊的低雜訊放大器。實驗結果3-dB頻寬為 8 GHz,平坦的增益指數 14.1±1.5 dB,電路功率消耗為7.22 mW,整體電路特性FOM值為1.22,此結果非常適合應用於94 GHz氣象雷達系統。 最後的晶片為寬頻低雜訊放大器 , 輸入和輸出為寬頻匹配 , 可應用於77~81 GHz 汽車雷達和94 GHz氣象雷達系統。而且P1B和IIP3都比上一顆晶片有所提升。

並列摘要


This thesis aim is to design and implement the W-band low noise amplifiers and W-band power amplifier. The thesis can be divided into three parts: In the first part, a 77~81 GHz low noise amplifier is designed for W-band system. For the sake of reducing chip size and cost, we design a two stage cascade amplifier. In the first stage we use a common source circuit. In order to get sufficient gain, we use a cascode circuit in the second stage. Then we use “T-matching” technique at the input and output term to achieve flat high gain (S21), low noise figure and better “S-Parameter” performances. Finally, we put bypass capacitances at the ”VDD” and “VGS” term to make our circuit more stable. The second part is on the design and implement of a high added efficiency power amplifier for 79GHz applications in 90nm CMOS technology. In this circuit, we used the cascade-stage structure as first stages to eliminate the Miller effect and improve the reverse isolation. But linearity and power consumption are worse than common source stage. Therefore, the second stage is using common source topology. In the cause of improving the output power and power added efficiency, we use the power divider/combiner to implement final stage. In the third part, a 94 GHz low noise amplifier is implemented for the weather radar system. In order to obtain the high gain and wide bandwidth, we used three common source and conjugate matching techniques between interstage. We design a high gain, wideband and low noise LNA in TSMC 90 nm CMOS technology. The experimental results showed that the 3 dB bandwidth of 8 GHz, flat gain of 14.1±1.5 dB and power consuming of 7.22 mW and figure of merit (FOM) is 1.22, this results show that this LNA is suitable for weather radar systems. In final, a wideband low noise amplifier is implemented. Input and Output have wideband matching. It can be applied to 77~81 GHz automotive radar and 94 GHz cloud radar instrumentation. In addition, its P1dB and IIP3 have improved.

參考文獻


References
[1] 林佑昇,邱弘緯,梁效彬 編著(2011): RFID 晶片設計。
[2] Y.-S. Huang, "Design and Realization of 2.4-GHz CMOS RF Front-end Receiving Circuit," MS Thesis, NTU, Dept. of EE, June 2000.
[3] Yunseo Park, Chang-Ho Lee, J.D. Cressler, and J. Laskar, "The Analysis of UWB SiGe HBT LNA for Its Noise, Linearity, and Minimum Group Delay Variation," Microwave Theory and Techniques, IEEE Transactions on Volume 54, Issue 4, Part 2, Page:1687-1697, June 2006.
[4] N. Demirel, R. R. Severino, C. Ameziane, T. Taris, J. B. Begueret, E. Kerherve, A. Mariano, D. Pache, and D. Belot, "Millimeter-Wave Chip Set for 77-81 GHz Automotive Radar Application," IEEE New Circuits and Systems Conference (NEWCAS), pp. 253-256, 2011.

被引用紀錄


陳志義(1999)。體育課學生目標取向、知覺動機氣候與常規管理之相關研究〔碩士論文,國立臺灣師範大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0021-2603200719102563

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