雙模切換式讀出電路設計於焦平面陣列感測器

The Research of Dual Switch Mode Integrated Readout Circuit Design for Focal Plane Array Detector

楊銘陞(Ming-Sheng Yang)

指導教授 ： 孫台平

國立暨南國際大學/科技學院/電機工程學系/碩士(2012年)

https://doi.org/10.6837/NCNU.2012.00141

摘要

本論文完成雙模切換式緩衝放大器注入型(Buffer direct injection, BDI)與直接注入型(direct injection, DI)之讀取電路設計與實現，直接注入型讀取電路具有電路簡單、面積小、功率低等優點，但受限於感測器內阻大小，而影響光電流注入效率。採用緩衝放大器實現緩衝放大器注入型讀取電路，藉由緩衝放大器的加
入可達成降低輸入阻抗與提高注入效率等優點。
為了能更廣泛使用於多種類型感測器，結合DI與BDI各優點並於感測器種類上選擇不同對應電路架構，以加入開關控制來進行讀出電路架構的切換動作，達到電路內可同時具有BDI & DI兩種讀出電路模式。完成可切換模式陣列型讀出電路，利用兩種不同讀取電路相對應感測器達到最佳訊號擷取。並對於電路之功率、效率值、佈局面積、電路雜訊等方面做探討與分析。
BDI讀出電路主要設計考量於緩衝放大器的增益、頻寬與雜訊，電路模擬結果增益(gain)達到40dB，共模拒斥比(CMRR)為87dB。此電路採用TSMC 0.35um 2P4M CMOS 5V製程技術，像素讀取電路佈局面積為30um x 30 um，設計了10x8陣列大小的讀出電路，設定電流輸入範圍為10p~10 nA，電路輸出擺幅為2 V，模擬訊號雜訊比為65dB，模擬電路功率消耗為9.705mW。量測結果電流輸入範圍為10p~10 nA，積分時間可調，電路輸出擺幅為2V系統雜訊電壓Vrms為4.84mV，訊號雜訊比為52dB，整體晶片電路功率消耗為9.94mW。

關鍵字

雙模切換式讀出電路 ； 紅外線讀取電路

並列摘要

This paper proposes dual-mode buffer direct injection (BDI) and direct injection (DI) readout circuit design. The DI readout circuit has advantages which include simple circuit, small layout size and low power consumption. The photodetector size limit internal resistance that will affect the photocurrent injection efficiency. We used buffer amplifier to achievement of the BDI readout circuit. The buffer amplifier would reduce input impedance and raise injection efficiency.
Combining advantages of DI with BDI is used many types of sensors applications. According to the sensor types, added switch to control readout circuit structure become BDI & DI, to suit different photodetector of pixel. It has completed dual switch mode which has detected different sensor at array integrated readout circuit. We debated from the power, efficiency, injection efficiency, layout area and circuit noise.
Gain, bandwidth and noise are the BDI readout circuit design of chief considerations. Simulation result of amplifier gain is 40dB and CMRR is 87dB. The Circuit is simulated by using TSMC 0.35um Mixed Signal 2P4M CMOS 5V process. The dimension of pixel is 30×30μm. We have design a 10x8 array for readout circuit of columns interlace. The input current setting 1nA to 10nA, the simulation output voltage swing is 2V and the total power consumption is less than 9.76mW. The measurement current setting 10p to 10 nA. The integration time would adjust. The circuit output swing is 2V, system noise voltage (Vrms) is 4.84mV, signal to noise ratio is 52dB, and the full chip circuit power consumption is 9.94mW.

並列關鍵字

Dual switch mode readout circuit ； ROIC

參考文獻

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