利用射頻濺鍍製作氧化鋁鈰 MIS 電容器之電性與結構特性分析

The Electrical and Structural Properties of Al/CeAlO/p-Si MIS Capacitors Fabricated by RF Sputtering

賴冠廷(Guan-Ting Lai)

指導教授 ： 程金保 ； 劉傳璽

國立臺灣師範大學/科技學院/機電科技研究所/碩士(2010年)

摘要

極薄高介電係數氧化鈰和氧化鋁鈰薄膜分別利用射頻磁控濺鍍的方式，沉積在p型的矽基板上，以做成金屬-絕緣體-半導體的電容器。在室溫下沉積薄膜在不同的氧氬比，經由橢圓儀所量測出來的物理厚度約為7奈米，沉積之後在氮氣環境下進行快速熱退火，溫度為550oC和850oC，由X光繞射和原子力顯微鏡，可看出薄膜在經過快速熱退火所顯示結晶與非晶態的現象。由Agilent B1500A electrometer和4980 LCR meter可進行電流-電壓和電容-電壓的電性量測。穿透式電子顯微鏡和X射線光電子能譜是用來確認微觀的氧化鈰和氧化鋁鈰絕緣體與矽基板所形成的介面層。
根據X光繞射，氧化鈰薄膜在退火550oC是為非晶態的，但退火到850oC是有結晶的現象，所以當退火溫度從550oC到850oC時，介電常數和漏電流都有下降的現象產生。這種現象歸因於較高的退火溫度形成較厚的界面層，這也證實了X光繞射、X射線光電子能譜和穿透式電子顯微鏡。
另一方面，氧化鋁鈰在退火850oC是非晶態的，表明氧化鈰加鋁可抑制結晶的形成。此外，由於薄膜沉積過程中氧氬比從0:5增加到3:5時，介電常數增大，閘極漏電流降低。這種現象是符合的氧空位模型。
結論為氧化鈰和氧化鋁鈰閘極絕緣層的電性及材料特性進行了量測和比較。氧化鈰加鋁可提高結晶溫度。氧化鈰或氧化鋁鈰的漏電流，主要分別由界面層厚度或氧空缺所主導。

關鍵字

濺鍍 ； 氧化鋁鈰 ； 氧缺

並列摘要

Ultra-thin high-k CeO2 and CeAlO films were independently deposited on p-type Si-substrate by RF magnetron co-sputtering as the gate insulators of metal-insulator-semiconductor (MIS) capacitors. The film deposition was carried out in the oxygen/argon (O2/Ar) ambient with various ratios at room temperature, and the physical thickness of the films was determined to be about 7 nm by ellipsometry. After deposition, a rapid thermal anneal (RTA) in nitrogen (N2) ambient was then performed at 550 or 850℃. The crystalline phases and morphologies of the high-k films after RTA were analyzed by X-ray diffraction (XRD) patterns and atomic force microscopy (AFM) measurements, respectively. Moreover, J-V (current density-voltage) and high frequency (1 MHz) C-V (capacitance-voltage) measurements were performed with Agilent B1500A electrometer and 4980 LCR meter, respectively, for electrical characterization. Transmission electron microscopy (TEM) and X-ray photoelectron spectroscopy (XPS) were utilized to confirm the microstructures of the CeO2 and CeAlO insulators and their interfacial layers formed in contact with the Si-substrates.
According to XRD, CeO2 films are amorphous after 550℃ annealing but are crystallized after 850℃ annealing. Moreover, as annealing temperature increases from 550 to 850℃, both the dielectric constant and gate leakage current of CeO2 films decrease. This phenomenon is attributed to a thicker interfacial layer (Ce-silicate) formed after a higher temperature RTA, which is confirmed by XRD, XPS, and TEM.
On the other hand, CeAlO films remain amorphous after 850℃ annealing, indicating that the incorporation of Al into CeO2 suppresses the crystallization. Furthermore, as the O2/Ar ratio during film deposition increases from 0:5 to 3:5, the dielectric constant increases and the gate leakage current decreases. This behavior is consistent with the oxygen vacancy model.
In conclusion, electrical and material properties of CeO2 and CeAlO gate insulators have been measured and compared. The addition of Al into CeO2 can raise crystallization temperature. The leakage current of CeO2 or CeAlO is suggested to be dominated by silicate thickness or oxygen vacancies, respectively.

並列關鍵字

sputter ； CeAlO ； oxygen vacancy

參考文獻

[1] S. H. Lo, D. A. Buchanan, Y. Taur and W. Wang, “Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s”, IEEE Electron Device Lett. 18, 209 (1997).

[3] B. E. Deal, “Standardized terminology for oxide charges associated with thermally oxidized silicon”, IEEE Electron Device Lett. 27, 606 (1980).

[4] D. K. Schroder, “Semiconductor material and device characterization”, 3rd ed (Wiley, New York, 2006).

[6] J. Roberson and C. W. Chen, “Schottky barrier heights of tantalum oxide, barium strontium titanate, lead titanate, and strontium bismuth tantalite”, Appl. Phys. Lett. 74, 1168 (1999).

[7] G. D. Wilk, R. M. Wallace and J. M. Anthony, “High-k gate dielectrics: current status and materials properties considerations”, J. Appl. Phys. 89, 5243 (2001).