CMOS技術中強健靜電防護之用具有NMOS開關整合矽控整流器之雙極電晶體電路

SCR-Incorporated BJT Circuits with an NMOS Switch for Robust ESD Protection in CMOS Technology

祁季凡(Ji-Fan Chi)

指導教授 ： 黃至堯

健行科技大學/電資學院/電子工程所/碩士(2011年)

https://doi.org/10.6824/UCH.2011.00041

摘要

在0.18?m CMOS製程下，應用於靜電放電防護(ESD)之矽控整流器(SCR)因其保持電壓(VH)在DC直流上表現過低，容易造成Latch-up(鎖定)的現象而導致電路的故障，因此本創作首先在0.6?m 10V製程中開發，浮接P+區域整合於NPN雙極電晶體所組成的新型整合矽控整流器之雙極電晶體。這種元件展現了接近矽控整流器的靜電性能，並且擁有高鎖定免疫的15V直流保持電壓，其直流保持電壓比其傳輸線脈波保持電壓大3V。在0.18?m CMOS製程部分,以SCR結合BJT的結構上加入一NMOS或者電阻電容閘極耦合NMOS的架構，在此兩種電路中可將NMOS視為開關，當NMOS導通時能進而利用其特性來箝位並降低保持電壓，使得SCR不易進入鎖定的狀態。上述結合SCR的BJT以及RC閘極耦合NMOS結合SCR的BJT電路經直流及傳輸線脈波儀器的量測結果，不但兩種架構的保持電壓都較傳統的SCR提高了10倍以上，而且其靜電強度也與矽控整流器相同。

關鍵字

靜電放電 ； 矽控整流器 ； 鎖定 ； 保持電壓 ； 電阻電容閘極耦合

並列摘要

In 0.18μm CMOS process, A traditional SCR is easily susceptible into latch-up and leads to circuit fail for electrostatic discharge (ESD) protection, it is due to very low DC holding voltage performance of the SCR. Therefore, this work first developed a new SCR-incorporated BJT which is composed of a floating P+ region integrated in an parasitic NPN BJT in 0.6?m 10V technology. This device exhibits a ESD performance close to an SCR and high-latchup-immune DC holding voltage of 15V. Its DC holding voltages are quite desirably 3V higher than its TLP ones. This work also develops new circuit structures in a 0.18μm CMOS process for further improving holding voltage and latch-up Immunity. This circuit integrates an SCR-incorporated BJT with either a single NMOS or RC-gate-coupled NMOS structure. During ESD zapping, the NMOS can be regarded as a switch in turn-on state to clamp ESD voltage and reduce the holding voltage to enable SCR action, while the NMOS is switched off to disable the SCR action during DC standby condition. The ESD threshold and holding voltage of this SCR-incorporated BJT with the above-mentioned structure has been verified by DC and TLP measurements. In consequence, the holding voltage of the both new structures is not only about ten-times higher than that of the traditional SCR, but also their ESD robustness is the same as that the SCR.

並列關鍵字

electrostatic discharge (ESD) ； SCR ； latch-up ； holding voltage ； RC-gate-coupled

參考文獻

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