以FPGA實現具有能源回收煞車之無刷直流馬達控制晶片之設計

Design of FPGA-Based Brushless DC Motor Control Chip with Energy Recovery Braking

呂宜法(Yi-Fa Lu)

指導教授 ： 陳添智

崑山科技大學/工程學院/電機工程研究所/碩士(2011年)

https://doi.org/10.6828/KSU.2011.00077

摘要

本文主旨在於研製一具有能源回收煞車之無刷直流馬達控制晶片之設計，利用變頻器雙向導通之特性，配合無刷直流馬達三相電壓之相對關係，並以無刷直流馬達內部線圈作為電感器，透過FPGA硬體電路控制變頻器內電晶體之切換順序與時機，使馬達之電動勢、馬達內部線圈、變頻器與電池四者構成一升壓電路。此控制法可以將煞車時的動能轉換成電能回充至電池端並產生一反向力矩使馬達減速，卻不需要在原有之驅動器外添加任何元件。
本文最後將以Altera生產之FPGA晶片Cycione II EP2C35F672作為核心控制器，整合本文所介紹之再生控制方法，設計一具有能源回收煞車之無刷直流馬達控制晶片。

關鍵字

FPGA ； 能源回收煞車 ； 無刷直流馬達

並列摘要

The main objective of this thesis is to develop a brushless DC (BLDC) motor control chip with the fanction of energy recovery braking. The boost circuit of the regenerative braking method is proposed by combining the electromotive force of the BLDC motor, with BLDC circuits of BLDC winding, the inverter and the battery. The voltage boost is achieved by controlling the switching sequence and timing, which is derived from the relations of the three-phase voltages, of the inverter, The regenerative braking method which is proposed in this thesis could convert the kinetic energy into electric energy and produce a reverse torque to reduce the speed of the motor without adding any other component to the original controller.
Finally, the regenerative braking method is realized using the FPGA Cycione II EP2C35F672 from Altera as the core controller, for designing a brushless DC motor control chip.

並列關鍵字

FPGA ； BLDC ； Energy Recovery Braking

參考文獻

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