一款應用於可程式化實驗室晶片之以取比例為基礎的高精準度及高效率電容讀出電路

High-Resolution and High-Efficiency Proportion-Based Capacitive Readout Circuit for Field Programmable Lab-On-a-Chip (FPLOC) Application

康艾文(KARSTEN, IVAN)

指導教授 ： 李鎮宜

國立交通大學/電機學院/電機資訊國際學位學程/碩士(2015年)

https://doi.org/10.6842/NCTU.2015.00697

摘要

無資料

關鍵字

電容讀出電路 ； 之以取比例為基礎

並列摘要

無資料

並列關鍵字

Capacitive Readout Circuit ； Proportion-based

參考文獻

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