適用多層次與混合式Alamouti時空區塊編碼高速MMSE-QR分解之硬體架構設計與實現

Hardware Architecture Design of the High Throughput MMSE-QR Decomposition for the Layered and Hybrid Alamouti STBC MIMO Systems

洪啟修(Qi-Xiu Hong)

指導教授 ： 劉宗憲

國立中正大學/工學院/通訊工程學系/碩士(2013年)

摘要

最近幾年以來，多輸入多輸出(Multiple Input Multiple Output, MIMO)技術在無線通訊的發展過程中備受青睞。在MIMO系統中，檢測(detection)是很重要的部分，而有些檢測器則會結合QR分解的運算，如SIC(Successive Interference Cancellation)檢測器、K-best檢測器。本篇論文主要探討的主題，為Layered Alamouti STBC(Space-time Block Coding)系統下使用MMSE(Minimum Mean Square Error)預處理之QR分解硬體架構設計，主要是討論 4x2 DSTTD(Double Space-time Transmit Diversity)系統，搭配 3x2 Hybrid STBC系統，再加上 2x2 MIMO系統，設計並實現一個可適用於此三種系統之硬體架構，且搭配IEEE 802.11ac的規格，將天線數延伸至 6x3。QR分解的部分，是選用BCGR (Block-wise Complex Givens Rotation)演算法，此為改良後專門應用於Layered Alamouti STBC的Givens Rotation演算法，並且以CORDIC(COordinate Rotation DIgital Computer)演算法來做硬體上的實現，然而BCGR相對於傳統的Givens Rotation有著演算法上的優勢，輔以Layered Alamouti STBC系統下，等效通道矩陣的對稱性，進而達到了演算法以及硬體架構實現上的優勢。在硬體實現這部分，是使用Xilinx ISE 12.2進行Verilog code的程式撰寫，透過Xilinx ISE 12.2內建之函數驗證(Function verification)來確認結果之正確性，並以Virtex6系列中型號為XC6VHX250T的FPGA模擬板來進行電路合成(Synthesis)，最後以Design Compiler來進行最後的Pre-simulation，其中最大操作頻率可至125MHz。

關鍵字

Givens rotation ； MIMO ； STBC ； DSTTD ； QR分解 ； CORDIC

並列摘要

In recent years, the multiple input multiple output (MIMO) technique has been widely used in the development of wireless communications. Detection of the transmitted symbols is a very important part in the MIMO baseband receiver. Some MIMO detectors, such as the SIC and K-best detectors, rely on the QR decomposition (QRD) at their preprocessing stage. In this thesis, the hardware architecture with minimum mean square error (MMSE) preprocessing QRD for the 4-by-2 double space-time transmit diversity (DSTTD), 3-by-2 hybrid Alamouti space-time block coding (STBC), and 2-by-2 spatially multiplexed MIMO systems are studied in this thesis. According to the IEEE 802.11ac draft standard, the antenna configuration of 6-by-3 is also considered. The block-wise complex Givens rotation (BCGR) algorithm will be applied to the layered Alamouti STBC MIMO system. The CORDIC modules will be used to realize MMSE QRD. Note that the BCGR is more powerful than conventional Givens rotation in computing the MMSE QRD of the channel matrices in the studied MIMO systems. With the symmetry of equivalent channel matrix in layered Alamouti STBC system, the designed algorithm and architecture outperform its counterpart conventional algorithm and architecture. The designed hardware architecture is synthesized and verified in the Xilinx ISE 12.2 environment with FPGA Virtex6 XC6VHX250T. The designed architecture is also synthesized by the Design Compiler producing results that the designed architecture can work with maximum frequency 125 MHz.

並列關鍵字

Givens rotation ； MIMO ； STBC ； DSTTD ； QR decomposition ； CORDIC

參考文獻

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