應用於SDM 與DSTTD 多天線系統下之 樹狀搜尋Hard-output 檢測器及LORD 前置處理 的Soft-output 檢測器之硬體架構研究

HardwareRealization of Hard-output and LORDSoft-output Tree Search Detectorsfor SDM and DSTTD Systems

林宸暐(Chen-Wei Lin)

指導教授 ： 劉宗憲

國立中正大學/工學院/通訊工程學系/碩士(2014年)

摘要

在無線通訊之中, 為了要提供較高的傳輸速率(data rate) , 有別於傳統單天線系統, 我們藉由增加天線數同時傳送資訊來提高傳輸速率, 進而演變出多輸入多輸出(MIMO) 的調變技術。空間分集多工(spatial division multiplexing, SDM) 為最基本的傳送模式, 雙重時空多樣(DSTTD) 系統則可以在不增加系統總體頻寬下提供傳送端分集與改善空間多工的增益, 乃為相當實用之技術。在系統中, 偵測器可以分為硬式偵測解碼(Hard-Output)與軟性偵測解碼(Soft-Output) , 本篇論文對兩大類的偵測解碼方式皆有討論。在Hard-Output 檢測器方面, 大多數人認為最好的檢測器(detector) 是最大相似度檢測器(maximum likelihood detector, MLD) , 但是MLD在硬體實作的複雜度過高的問題也是眾所皆知, 因此衍生了許多降低硬體複雜度的演算法, 在樹狀搜尋檢測器中就有FSD(Fixed Sphere Decoder) 及K-Best 兩種較低複雜度的演算法, 本文即在SDM 及DSTTD 兩系統下結合FSD 樹狀搜尋檢測器做硬體實踐, 我們更進一步提出了兩種系統的Multi-mode 硬體架構, 在環境設定上, 有2x2及4x2兩種多天線系統, 使用64-QAM調變, 除保有原架構優點外, 更能充分縮短處理時間, 以達更短的latency 。而在Soft-Output 檢測器方面, 一樣為將低硬體複雜度, 我們選用了Layered Orthogonal Lattice Detector (LORD) 演算法在SDM 系統下做硬體結構的研究, 在硬體環境設定上選用了2x2的多天線系統,調變方式為QPSK 。綜觀以上, 本論文共包含2x2 SDM ORVD FSD、4x2 DSTTDORVD FSD、2x2 SDM 與4x2 DSTTD Multi-mode及2x2 SDM LORD Soft-Output 四種硬體架構, 接著使用Xilinx ISE 12.2進行Verilog 程式撰寫, 並利用Matlab 程式輔助驗證程式的正確性, 最後使用Design Compiler 合成數據。

關鍵字

軟式偵測 ； 硬式偵測 ； 多輸入多輸出

並列摘要

In wireless communication systems, in order to provide higher transmission data rate, unlike SISO system, we increase the number of antennas. Among them, the spatial division multiplexing, SDM is the basic transmission mode, Double Space-Time Transmit Diversity (DSTTD) system is a quite useful technical to achieve both the spatial diversity gain and multiplexing gain without increasing the overall system bandwitch.The baseband MIMO detectors are divided into two categories, the Hard-Output and Soft-Output detectors, two detection types are discussing in this thesis. About Hard-Output detector, the maximum likelihood detector (MLD) is the optimal detector. But,the MLD requires very high computational complexity, therefore, many algorithms to lower computational complexity appear. There are two low-complexity tree search detectors,FSD (Fixed Sphere Decoder) and K-Best. We combines FSD tree search detector in the two systems do SDM and DSTTD hardware realization, we further propose two systems Multi-mode hardware architecture, on setting the environment, there are two types of 2x2 and 4x2 multi-antenna system using 64-QAM modulation, in addition to retain the advantages of the original structure, it can fully shorten the processing time then achieve shorter latency. And about Soft-Output detector, we chose Layered Orthogonal Lattice Detector (LORD) algorithm to do research in the hardware architecture SDM system, there is 2x2 multi-antenna system using QPSK modulation on the environment setting. Above all, we total do four schemes, including 2x2 SDM ORVD FSD、4x2 DSTTD ORVD FSD、2x2 SDM and 4x2 DSTTD Multi-mode, and 2x2 SDM LORD Soft-Output. And their associated hardware architectures are designed. The designed architectures are described by the Verilog code, verified in the Xillinx ISE 12.2 environment, and synthesized with the Design Compiler.

並列關鍵字

Multi-mode ； FSD ； Soft-Output ； Hard-Output ； SDM ； DSTTD ； MIMO ； LORD

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