多天線系統下MMSE前置處理之樹狀搜尋檢測器硬體架構設計與實現

Hardware Architecture Design and Implementation of the MIMO Tree Search with MMSE Preprocessing Detector

黃佳祥(Chia-Hsiang Hwung)

指導教授 ： 劉宗憲

國立中正大學/工學院/通訊工程學系/碩士(2013年)

摘要

在多天線(MIMO) 系統下, 大多數人認為最好的檢測器(detector) 是最大相似度檢測器(maximum likelihood detector, MLD) , 但是MLD 在硬體實作的複雜度過高的問題也是眾所皆知, 因此衍生了許多降低硬體複雜度的演算法。在本論文中選擇將複數訊號模型利用兩種轉為實數模型的方法, 包括RVD(real-valued decomposition)和ORVD(orthogonal real-valued decomposition) 兩種方法, 再選擇兩種樹狀搜尋的演算法, 包括K-Best 和FSD(Fixed Sphere Decoder) , 搭配MMSE 前置處理(preprocessing) , 和一般常見的Zero-Forcing 前置處理所設計出的硬體架構及合成數據分別做比較。硬體方面的話, 設定的環境是在4×4的實數多天線系統, 使用的是16QAM 調變, K-Best的K 值全部都為4 , 並已18位元長度來代表運算的數值,至於傳送符元(Symbol)則以3位元表示。本論文包含八種架構分別為: ZF-RVD-KBEST、MMSE-RVD-K-BEST 、ZF-ORVD-K-BEST 、MMSE-ORVD-K-BEST 、ZFRVD-FSD 、MMSE-RVD-FSD 、ZF-ORVD-FSD 和MMSE-ORVD-FSD , 接著使用Xilinx ISE 12.2進行Verilog程式撰寫, 並利用Matlab程式輔助驗證程式的正確性,最後使用Design Compiler 合成(synthesis) 。

關鍵字

FSD ； K-Best ； MMSE前置處理 ； ORVD ； RVD ； 多天線 ； Design Compiler

並列摘要

In the multiple-input multiple-output (MIMO) systems, the maximum likelihood detector (MLD) is the optimal detector. But, the MLD requires very high computational complexity; therefore, many suboptimal detectors are developed. The suboptimal K-Best and fixed sphere decoder (FSD) are two low-complexity tree search detector that perform closely to the MLD. In this thesis, conversion of the complex signal model to real signal model is considered in two different ways, include real- valued decomposition (RVD) and orthogonal real-valued decomposition (ORVD). Furthermore, unlike the conventional zero-forcing preprocessing, the minimum mean squared error (MMSE) preprocessing is applied to the detection schemes in this thesis. A total of 8 detection schemes, include of ZF-RVD-K-Best, MMSE-RVD-K-Best, ZF-ORVD-KBest, MMSE-ORVD-K-Best, ZF-RVD-FSD, MMSE-RVD-FSD, ZF-ORVD-FSD and MMSE-ORVD-FSD, and their associated hardware architectures are designed. The designed architectures are described by the Verilog code, verified in the Xillinx ISE 12.2 environment, and synthesized with the Design Compiler.

並列關鍵字

FSD ； K-Best ； MMSE Preprocessing ； ORVD ； RVD ； MIMO ； Design Compiler

參考文獻

[2] A. Paulraj, R. Nabar, and D. Gore, Introduction to Space-Time Wireless Communications. Cambrige University Press, 2003.

[4] K. W. Wong, C. Y. Tusi, R. S. K. Cheng, and W. H. Mow, “A VLSI architecture of a K-best lattice decoding algorithm for MIMO channels,” in Proc. IEEE Int. Symposium on Circuits and Systems (ISCAS), vol. 3, Aug. 2002, pp. 273-276.

[5] C.-H. Yang and D. Markovic, “A flexible DSP architecture for MIMO sphere decoding,” IEEE Trans. Circuits and Systems-I: Regular Papers, vol. 56, no. 10, pp. 2301-2314, Oct. 2009.

[6] M. Shabany and P. G. Gulak, “Scalable VLSI architecture for K-Best lattice decoders,” in Proc. IEEE Int. Symposium Circuits and Systems (ISCAS), Jun. 2008, pp. 940-943.

[7] M. Shabany, K. Su, and P. G. Gulak, “A pipelined scalable high-throughput implementation of a near-ML K-Best complex lattice decoder,” in Proc. IEEE Int. Conf. Acoustics Speech and Signal Processing (ICASSP), Apr. 2008, pp. 3173 3176.