微晶矽薄膜電晶體及記憶體元件

凃政暉

doi:10.6842/NCTU.2012.00642

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微晶矽薄膜電晶體及記憶體元件

Micro-crystalline silicon thin film transistors and memory devices

凃政暉 , Masters　　Advisor：謝嘉民　　

繁體中文 DOI： 10.6842/NCTU.2012.00642

電晶體；記憶體；微晶矽； Thin film transistor ； Memory ； Micro-crystalline Silicon

Abstract │ Reference (25) │ Times Cited (3) │ Altmetrics

Abstract 〈TOP〉

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In this thesis, high crystallinity and low resistivity of intrinsic and n-type microcrystalline silicon (μc-Si:H) thin films were deposited at 265oC by inductively coupled plasma chemical vapor deposition system (ICPCVD).  The high crystallinity of μc-Si:H and thin incubation layer of amorphous silicon (a-Si) were examined by the analysis of X-Ray diffraction (XRD) and transmission electron microscope (TEM), respectively.  In addition, after systematically optimizing the parameters of dielectric,   such as Ar flow, RF power, chamber pressure and the ratio of SiH4/N2O, the high quality dielectric was developed.  The dielectric with ultra-thin thickness (5nm), low leakage current dielectric (10-8A/cm2 within 10 V operation) and compact film were examined by interface trap state density by high/low frequency method, analysis of leakage current and etching rate evaluation. Therefore, we use plasma to developed low leakage current and defect and successfully construct a series of top-gate thin film transistors (TFTs) with different thickness. This plasma technology will be able to achieve the vision of the 3D stacking device. This dielectric with low interface trap states enables the reduction of threshold voltage of 1 V.  By integration of active layer with high crystallinity and dielectric with high quality, the staggered top- and bottom- gate TFTs achieved mobility of 466 cm2/V-s and 123 cm2/V-s, sub-threshold swing of 0.1~0.2 V/decade and on/off ratio of 106. Nonvolatile memories such as flash memories and electrically erasable programmable read-only memories (EEPROMs) on silicon wafers have been extensively utilized in high-density memories, programmable logic, and microcontrollers. However, fabricating nonvolatile memory devices with favorable electrical characteristics on glass substrates is difficult because of the limit on the glass transition temperature (Tg) of glass substrates. Finally, we implement this dielectric and active layer technology in metal-oxide-nitride-oxide-semiconductor (MONOS) type nonvolatile memory (NVM), successfully reduce the program/erase voltage, and constructi low temperature SONOS-memory operated with low and fast programmable pulses. Since SOP technology is primarily used for portable electronics, low power consumption is a basic requirement to ensure a long battery life. This breakthrough not only reduces the cost of device fabrication but also is very promising for industrial application.

Reference ( 25 ) 〈TOP〉

[1] H. S. a. R. Swann, "Chemical vapour deposition promoted by rf discharge," Solid-State Electronics, vol. 8, pp. 653-654, 1965.
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[2] R. Chittick, "The preparation and properties of amorphous silicon," Journal of the Electrochemical Society, vol. 116, p. 77, 1969.
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[3] K.-Y. Chan, "High-mobility microcrystalline silicon thin-film transistors prepared near the transition to amorphous growth " Journal of Applied Physics, vol. 104, pp. 054506 - 054506-6, 2008.
連結：
[4] A. Matsuda, "Formation kinetics and control of microcrystallite in μc-Si:H from glow discharge plasma," Journal of Non-Crystalline Solids, vol. 59-60, pp. 767–774, 1983.
連結：
[5] C. C. Tsai, Amorphous Silicon and Related Materials. Singapore: World Scientific, 1988.
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