衝擊測試下餘震對電子構裝元件可靠度之影響研究

Aftershock Effects on the Reliability of Electronic Components under Shock Test

黃郁淳(Yu-Chun Huang)

指導教授 ： 陳永樹

元智大學/工程學院/機械工程學系/碩士(2009年)

摘要

衝擊測試是電子產品可靠度測試的重點項目之一，一般的掉落衝擊測試依據JEDEC標準規範，如衝擊過程中必須符合規範中所定義之最大加速度值(Peak Acceleration)、衝擊作用時間(Pulse Duration)、速度改變量(Velocity Change)。然而實驗發現，掉落衝擊過程中往往不僅產生單一衝擊波，而是伴隨兩次或多次的餘震(Aftershock)，但是這些餘震在測試過程中往往被忽略。因此，本研究主要針對衝擊餘震的產生及其影響，預估餘震所發生的時間及相對所產生加速度值大小。
在實驗部份，藉由改變實驗參數如掉落平台高度、底座膠塊材料性質或厚度…等等，量測掉落平台及電路板中間位置之加速度值。然後，擷取電路板加速度響應結果，以濾波方式將時域訊號響應轉換成頻域訊號響應，繪出衝擊響應譜(Shock Response Spectrum，SRS)，並且與數值模擬結果做比對，以驗證實驗之準確性。
在有限元素分析部份係應用ANSYS-DYNA，分析之負載則使用目前廣泛應用的一種加速度邊界條件輸入法(Input-G Method)，其為在電路板固定之支承點施予加速度負載，模擬時僅需建立電路板以及其上構裝體的模型，而不必考慮電路板掉落過程與導向桿(Guide Rod)之摩擦力以及碰撞面性質等因素。
在理論方面則針對三個連續衝擊波，利用實驗數據結合數值曲線擬合(Curve Fitting)的方式定義其數學模式。再將所定義之連續衝擊波代入單自由度質量-阻尼-彈簧系統求得系統之響應解，同時也利用有限元素分析求解以驗證理論之精確性。
本研究建立適用於電子元件之衝擊餘震理論準則，準確評估電子構裝元件受衝擊下之餘震之大小及發生的時間，期望對電子構裝元件之可靠度設計有所助益。

關鍵字

衝擊試驗 ； 餘震 ； 可靠度 ； 衝擊響應譜

並列摘要

Shock test is one of the significant reliability tests for the electronics products. JEDEC test standard provides the guidelines for the circuit board shock (drop) test specifications. However, JEDEC test standards only regulate the first controlled-pulse by defining a variety of conditions such as the pulse peak acceleration, pulse duration and velocity change during the drop impact processes. In reality, a practical test showed that not only was one pulse produced, but also a series of two or more aftershocks are encountered. Hence, it is doubtful on whether and how the aftershocks influence results of components’ reliability. The purpose of this study is to investigate the aftershocks’ effect on the test products and to predict the time interval of its occurrence as well as the relating acceleration responses.
In the experimental part of the study, the accelerations both at the drop table and the middle of the print circuit board (PCB) tested were measured by varying those test parameters such as material types of rubber cushion, their thickness, and the drop table height,…etc. The shock response spectrum (SRS) was presented from filtering the time-domain data and transforming it into frequency domain data. The experimental results are then compared with the analyzed results for the verification purposes.
The finite element (FE) analysis model for drop test was also conducted by using ANSYS/LS-DYNA. The acceleration loadings are input to the test vehicle support by adopting the Input-G-Method. This method requires building the model of the test vehicle only whereas does not have to consider friction of the guide rod for the drop table and the cushion materials.
Meanwhile, the three aftershocks out of the test were also modeled with the mathematical equation from curve fitting. The results are taken as an input to a theoretical single degree of freedom (SDOF) system for solving the system’s responses. Meanwhile, all the results out of the SDOF system are also solved with the finite element analysis for verifying with the theoretical model.
The study conducted a theoretical work on the aftershock that occurs during the reliability test of electronic products. It can precisely examine the severity of aftershock and the time instant it happens. The corresponding results can be very helpful to improve the reliability of electronic component at the system design stage.

並列關鍵字

Aftershock ； Finite Element ； Reliability ； Shock ； Shock Response Spectrum

參考文獻

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