橫向型高電壓氮化鎵金氧半場效電晶體與氮化銦鎵金氧半場效電晶體之研製

Investigation of Lateral High Voltage u/p-GaN MOSFETs and InGaN MOSFETs

朱柏儒(Po-Ju Chu)

指導教授 ： 黃智方

國立清華大學/電機資訊學院/電子工程研究所/碩士(2010年)

摘要

本論文研製橫向型高電壓氮化鎵金氧半場效電晶體，同時利用乾蝕刻平台結構與離子佈值技術的雙重絕緣結構隔絕基板表面漏電流。我們證實空乏式N型氮化鎵金氧半場效電晶體最大電流密度為100mA/mm，臨界電壓為-3V，導通電阻為35 mΩ-cm2 (VGS=35V)，場效載子遷移率為26 cm2/Vs(VDS=0.1V)；同時證實增進式P型氮化鎵金氧半場效電晶體，臨界電壓為2.37V，最大電流密度為70mA/mm，導通電阻為48 mΩ-cm2 (VDS=0.5V)，場效載子遷移率為21 cm2/Vs(VDS=0.1V)。在通道長度為3μm，漂移區長度為25μm的P型氮化鎵金氧半場效電晶體元件，最大崩潰電壓為120V。
另外研製橫向型高電壓氮化銦鎵金氧半場效電晶體，藉由氮化銦鎵通道試圖改善氮化鎵金氧半場效電晶體的場效載子遷移率，我們使用源極與汲極金屬未燒結方式以及未加入源極與汲極重摻雜結構製作金氧半場效電晶體，全程皆為低溫製程，同時延伸閘極與汲極之間距離，製作空乏式高電壓金氧半場效電晶體，最大崩潰電壓為380V，通道長度100μm的最大場效載子遷移率為93 cm2/Vs。

關鍵字

氮化鎵 ； 氮化銦鎵 ； 金氧半場效電晶體 ； 高電壓 ； 離子佈值 ； 橫向型

並列摘要

Lateral high-voltage single RESURF GaN MOSFETs on sapphire substrates were investigated and fabricated, with mesa isolation and Zn implantation isolation to avoid surface leakage. We demonstrated depletion-mode uGaN MOSFETs with a maximum drain current density up to 100mA/mm, a threshold voltage of -3V and a specific on-state resistance of 35mΩ-cm2 when VG=35V. The channel mobility is 26 cm2/Vs extracted from linear region at VDS=0.1V. Furthermore, we have demonstrated enhancement-mode pGaN MOSFETs with a threshold voltage of 2.37V and a maximum drain current density higher than 70mA/mm, a specific on-state resistance as low as 48mΩ-cm2 at VG=35V. The channel mobility of 21 cm2/Vs is extracted from linear region at VDS=0.1V. A pGaN MOSFET with a channel length of 3μm and a RESURF length of 25 μm shows a maximum breakdown voltage up to 120V.
A lateral high-voltage InGaN MOSFET has also been investigated attempting to improve the channel mobility of GaN MOSFETs. In the fabrication of InGaN MOSFET, no ion implantation and no sintering for source and drain region was done and all fabrication has been realized at low temperatures. The depletion-mode InGaN HV-MOSFET was fabricated with the maximum breakdown voltage of 380V. The channel mobility measured from a long channel (100μm) device is 93 cm2/Vs.

並列關鍵字

GaN ； InGaN ； MOSFET ； High voltage ； Implantation ； Lateral

參考文獻

[1]T. P. Chow, “SiC and GaN High-Voltage Power Switching Device”, Materials Science Forum Vols. 338-342, pp. 1155-1160, 2000.

[4] S. Nakamura, T. Mukai, M. Senoh, and N. Iwasa, “Thermal annealing effects on p-type Mg-doped GaN films”, Japanese Journal of Applied Physics, vol. 31, pp. L139- L142, 1992.

[6] S. Nakamura, “III-V nitride-based light-emitting diodes”, Diamond and Related Materials, vol. 5, pp. 496-450, 1996.

[8] F. Ren, M. Hong, S. N. G. Chu, M. A. Marcus, M. J. Schurman, A. Baca, S. J. Pearton, and C. R. Abernathy,“Effect of temperature on Ga2O3(Gd2O3)/GaN metal–oxide–semiconductor field-effect transistors,” Applied Physics Letters, vol.73, Number 26,pp. 3893-3895,1998.

[10] K. Matocha,T.P. Chow, and R. J. Gutmann , “High -Voltage Normally Off GaN MOSFETs on Sapphire Substrates” IEEE Transactions on Electron Devices, vol. 52, no. 1, January 2005.