十位元電流式數位至類比轉換器之設計實現

The Design and Implementation of 10-bits Current-mode Digital-to-Analog Converter

陳彥光(Yen-Kuang Chen)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2001年)

https://doi.org/10.6840/cycu200100312

摘要

本論文描述一個給視頻方面運用十位元、75MS/s CMOS 數位至類比轉換器(Digital-to-Analog Converter)。所提出的數位至類比轉換器包含兩個分別給MSB和LSB單元的五位元數位權重的電流單元陣列。能帶隙參考電路(bandgap reference circuit)提供一穩定電壓驅動外接電阻產生穩定的電流給所設計的數位至類比轉換器(DAC)。經由所設計的電路，繞線的複雜度、晶片的面積和寄生電容可以大大的降低且可以達成十位元的解析度以及75MHz的轉換速率。
所設計的數位至類比轉換器採用台灣積體電路製造公司(TSMC) 0.35mm 1P4M 的製程來實現，佈局面積為 0.55 mm2。量測結果如下：DNL為 ± 0.5 LSB、INL為 ± 1.93 LSB、上升時間為5.72 ns、下降時間為4.56 ns且穩定時間為13.2 ns。

關鍵字

寬擺幅電流鏡 ； 數位權重電流陣列 ； 能帶隙參考電路 ； 數位至類比轉換器

並列摘要

This thesis describes a 10-bit 75 MS/s CMOS Digital-to-Analog converter (DAC) for video applications. The proposed DAC composed two 5-bit binary-weighted current arrays for both MSB and LSB bits. The bandgap reference circuit provides a stable voltage for driving the external resistor that can generate a steady current source for current array of proposed DAC. The routing complexity, chip area, and parasitic capacitance can be reduced dramatically whereas 10-bit resolution and 75-Mhz conversion rate can be obtained.
The designed DAC is implemented in a 0.35mm 1P4M digital CMOS process provided by TSMC, with active layout area of 0.55mm2 (740 mm * 740 mm) and total area including pads offered by TSMC is 2.25mm2 (1500 mm * 1500 mm). The measurement results show that DNL is ± 0.5 LSB, INL is ± 1.93 LSB, rise time is 5.72 ns, fall time is 4.56 ns and settling time is 13.2 ns.

並列關鍵字

Digital-to-Analog converter (DAC) ； Bandgap reference circuit ； Wide-swing Current Mirror ； Binary-weighted current array

參考文獻

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[7] A. Abrial et al., “A 27-MHz Digital-to-Analog Video Processor.” IEEE J. of Solid-State Circuits, Vol. 23, pp. 1358-1369, Dec. 1988.