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  • 學位論文

應用於VHF與UHF頻帶之可切換增益低雜訊放大器

Design and Analysis of Switched Gain Low Noise Amplifier for VHF and UHF band

指導教授 : 陳淳杰

摘要


近年來數位電視成為電視領域中主要趨勢,它比傳統類比電視具有更好的效能,如高解析度和較強的抗雜訊能力…等,而隨著數位電視的整合與需求,如DVB、 ISDB和DMB,讓電視接收器中的低雜訊放大器,設計變得更具挑戰性,這些挑戰性包括:寬頻、低雜訊、良好的阻抗匹配、低功耗和較小的晶片面積。然而低雜訊放大器也需要不同增益,來因應不同強弱的輸入訊號,維持最好的輸出,進而改善接收器的動態範圍。 本論文提出可切換增益低雜訊放大器,此放大器具有三種增益,使用切換電流與阻抗不匹配的技術來完成,採用的製程為TSMC 0.18µm mixed-signal CMOS process。可切換增益低雜訊放大器之佈局後模擬結果在170MHz到862MHz中為:增益範圍-20.47dB至21.8dB且noise figure範圍3.56dB至4.13dB,而在相同的頻率之下S11與S22都在-15dB以下。本切換增益放大器的主動區域面積為0.053mm2和使用1.8V個供應電壓只消耗6.16mW。

並列摘要


In recent years, digital TV (DTV) becomes the main stream of television technology instead of analog TV due to its superior performances such as high-resolution and robust noise immunity. With the increasing requirements of integration between various DTV standards, e.g., DVB, ISDB and DMB, the LNA designs in TV receivers become more and more challenging. These challenges include wide bandwidth, low noise figure, well impedance matching, low power consumption and small chip area. In addition, the low-noise amplifier also requires different gain for different input signal power to generate an optimum output level, thus optimizing the dynamic range of the receiver. This paper presents a switched-gain low noise amplifier (SGLNA). The proposed SGLNA achieves three step variable gains by combining current-steering and inter-stage impedance mismatching technique. Designed in a TSMC 0.18µm mixed-signal CMOS process, post-layout simulation results show that the SGLNA achieves a gain range of ¬–20.47dB to 21.8dB and a noise figure ranges from 3.56dB to 4.13 dB over the frequency range of 170MHz to 862MHz. The S11 and S22 are all less than –15dB over the same frequency range. The SGLNA occupies an active area of 0.053mm2 and consumes only 6.16mW at the high-gain mode from a 1.8V supply.

參考文獻


[4] 黃哲揚,” 超寬頻無線接收機之射頻CMOS前端電路設計”中原大學電子工程學系碩士論文,2006
[5] 嚴聖翔,” 應用於超寬頻系統之前端電路設計”中原大學電子工程學系碩士論文,2007
[3] 蔡承修,”3 – 10 GHz 寬頻低雜訊放大器”國立中央大學電機工程研究所碩士論文,2008
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[8] Behzad Razavi, “Design of Analog CMOS Integrated Circuits” McGraw-Hill,2008.

被引用紀錄


彭士峰(2017)。雙增益雙頻2.4/5.2 GHz低雜訊放大器運用在802.11a/b/g設計與實現〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201700463
胡凱堯(2014)。超寬頻低雜訊放大器之雜訊分析〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201400469
廖文嶔(2013)。應用於ZigBee之低功耗無電感低雜訊放大器〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201300471

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