應用於射頻系統之低雜訊放大器與混波器之設計

Design of Low Noise Amplifier and Mixer for Radio Frequency Application

許安昌(Ann-Chang Hsu)

指導教授 ： 林佑昇

國立暨南國際大學/科技學院/電機工程學系/碩士(2009年)

https://doi.org/10.6837/NCNU.2009.00013

摘要

本論文以低雜訊放大器和混波器為主，且最後我們利用台積電0.18 um CMOS製程實現了一顆24GHz CMOS前端電路。研究主題分成四部分：
第一部份，我們利用台積電0.13 um CMOS製程設計了應用於V頻帶系統之降頻混波器。主架構是並聯2個單平衡式混波器設計而成，為了使LO端不平衡式訊號轉為平衡式訊號，我們使用了電感和電容組成的巴倫；而中頻輸出端則應用source follower架構，把高阻抗拉到低阻抗，當作一個輸出緩衝。量測結果顯示此混波器3dB頻寬可達12GHz，在頻段39-51GHz，轉換增益皆維持7.6±1.5dB的增益，且LO-RF隔離度可大於34dB，而電路消耗之功率為38mW。
第二部份，我們利用台積電0.18 um CMOS製程設計了一顆24GHz之降頻混波器。主架構也是並聯2個單平衡式混波器設計而成，而為了減少閃爍雜訊的注入，我們使用PMOS開關電路來控制雜訊的取樣，且為了有足夠的增益，我們在中頻輸出端接上差動放大器使增益提升。量測結果顯示此混波器操作在24GHz時，轉換增益為1.6dB的增益，3端隔離度可大於21dB，且三階交會點(IP3)為+2dBm，而電路消耗之功率為20mW。
第三部份，我們利用台積電0.18 um CMOS 製程設計了一顆K頻帶之低功耗低雜訊放大器。為了有足夠的增益，此低雜訊放大器第一級和第二級是由共源級放大器疊接所組成的電流共用技術來降低電流的消耗，而第三級我們使用了cascode放大器，使增益再提高且也可以增加電路的隔離度。量測結果顯示此低雜訊放大器操作在22GHz時，增益為10.7dB，輸入返回損耗小於-10dB，4.5dB的雜訊指數(NF)，及非常低的8.1mW功率消耗。
最後，我們利用台積電0.18 um CMOS 製程實現了一顆24GHz射頻接收機前端電路，此電路包含低雜訊放大器和混波器，輸出為100MHz的中頻輸出，量測結果顯示此電路操作在24GHz時，轉換增益為17.7dB的增益，3端隔離度可大於23dB，且三階交會點(IP3)為-18dBm，而電路消耗之功率為38mW。

關鍵字

混波器 ； 低雜訊放大器 ； K頻帶 ； V頻帶 ； 電流共用 ； 三階交會點 ； 轉換增益 ； 隔離度

並列摘要

This thesis focuses on the LNA and mixer, and finally we have presented the 24GHz CMOS receiver front-end in TSMC 0.18um CMOS process. The thesis can be divided into four parts：
In the first part, we have presented a V-band down conversion mixer in TSMC 0.13 um CMOS process. The core of this circuit combines with two single balanced mixers parallel, and the LO lump elements balun is used to convert the LO signal from single-ended to differential signal. The measured results show that the 3dB bandwidth is 12 GHz from 39-51GHz and the CMOS mixer exhibits 7.6±1.5dB measured conversion gain. In addition, the LO to RF isolation is better than 34dB while the consuming power is 38mW.
In the second part, we have presented a 24GHz down conversion mixer in TSMC 0.13 um CMOS process. The core of this circuit combines with two single balanced mixers parallel. In order to reduce the flicker noise injection, we used PMOS switch circuits sharpening on/off transition of the mixer switching core so flicker noise from the stage is reduced. To enhance the conversion gain on purpose, we used differential amplifiers at IF port. The measurement performance is 1.56dB conversion gain at 24GHz and the 3-ports isolation performance is better than 21dB. The input third-order intercept point is +2dBm while the consuming power is 20mW.
In the third part, we have implemented a K-band low power low noise amplifier in TSMC standard 0.18 um CMOS process. To achieve sufficient gain, this LNA that two stages common source amplifiers stack, which current-reused technique to decrease current consumption. In the third stage, a cascode amplifier is used to enhance power gain and provided for good isolation. The measurement performance shows the power gain of 10.7dB, NF of 4.5dB and input return loss of better than 10dB at 22GHz. The circuit consumed very small dc power of 8.1mW.
Finally, we have presented the 24GHz CMOS receiver front-end in TSMC 0.18um CMOS process. It consists of a low noise amplifier (LNA), a mixer and converters that convert an RF input at 24GHz to an IF of 0.1GHz. The measurement performance is 17.7dB of power gain at 24GHz. The 3-port isolation performance is better than 23dB, and the input third-order intercept point is -18dBm while the consuming power is 38mW.

並列關鍵字

mixer ； low noise amplifier ； K-band ； V-band ； current-reused ； IP3 ； conversion gain ； isolation

參考文獻

References

[1] M. Tiebout, H. D.Wohlmuth, and W. Simburger, “A 1 V 51 GHz fully integrated VCO in 0.12 um CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig., San Francisco, CA, 2002, pp. 238–239.

[2] H. Shigematsu, M. Sato, T. Hirose, F. Brewer, and M. Rodwell, “A 40 Gb/s CMOS distributed amplifier for fiber-optic communication systems,” in IEEE Int. Solid-State Circuits Conf. Dig., San Francisco, CA, 2004, pp. 476–477.

[3] C. H. Doan, S. Emami, A. M. Niknejad, and R. W. Brodersen, “Design of CMOS for 60 GHz applications,” in IEEE int. Solid-State Circuits Conf. Dig., San Francisco, CA, 2004, pp. 440–538.

[4] Ping-Chun Yeh, Wei-Cheng Liu, and Hwann-Kaeo Chiou, “ Compact 28-GHz Subharmonically Pumped Resistive Mixer MMIC Using a Lumped-Element High-Pass/Band-Pass Balun,”Volume 15, Issue2, Feb.2005 Page(s): 62-64 Digital Object Identifier 10.1109/ LMWC.2004.842814