109dB, 9.6MHz, 0.38mW, 3.6v/us , 120pF/25K-Ohm 負載且固定相位使用威爾森差動電流鏡之低成本 米勒補償多級放大器

A 109dB, 9.6MHz, 0.38mW, 3.6v/us, 120pF/25K-Ohm Loaded Constant-Phase Miller-Compensated Multi-Stage Amplifier by Cascading Differential Wilson Current Mirror Pairs

黃吉弘(Ji-Hong Huang)

指導教授 ： 陳耀煌 ； 陳朝烈

崑山科技大學/工程學院/電子工程研究所/碩士(2010年)

摘要

在一般的運算放大電路之中，主要的效能訴求為高增益(Gain)、大頻寬(Bandwidth)、高驅動能力、以及低功率消耗(power dissipation)，為求同時達到這些效能，必須面臨的挑戰則是穩定度、電路面積成本的問題。本文以基於威爾森電流鏡之串接多級轉導運算放大器(OTAs)作為前級放大輸入訊號，在運算放大器的輸出級加上差動放大器且並聯米勒電容(Miller Capacitor)，藉此降低所需的補償電容值並提升電路效能。為了證實此架構之彈性以及效能優勢，本文分別分析與模擬三級、四級、以及五級電流式差動放大，並以TSMC 0.18μm製程進行四級放大電路之晶片實現，使得電路在120pF、25KΩ的負載下得到109dB的直流增益、9.6MHz的增益頻寬、0.38mW之功率消耗以及3.6v/us的推動能力，為以最小補償電容達到全差動式運算放大電路中最大FOM(figure of merit)者。

關鍵字

高增益 ； 頻寬 ； 功率消耗 ； 多級轉導運算放大器

並列摘要

The main performance indices of operational amplifiers include high gain, wide bandwidth, high driving ability and low power dissipation. However, it is very challenging to achieve these goals simultaneously especially stability and circuit area specifications are also considered. In this thesis, multistage operational transconductance amplifiers (OTAs) based on differential Wilson current mirrors pre-amplify the input signal. At the output stage, a differential pair undertakes both driving and Miller compensation such that very high performance is achieved while only single and small Miller capacitor is required for an output end. Moreover, the circuit configuration advantageous additional constant phase over wide bandwidth. To prove the flexibility and novel performance of the proposed multistage amplifier, we analyze and simulate configurations with different number of amplifier stages. An exemplar four-stage amplifier is also implemented with TSMC 0.18?慆 technology and under 120pF and 25KΩ load, we measured 109dB DC gain, 9.6MHz UBW, 0.38mW power consumption, and 3.6v/us driving ability featuring the largest figure of merit (FOM) using the smallest Miller capacitance.

並列關鍵字

Gain ； Bandwidth ； power dissipation ； OTAs

參考文獻

[2] G. A. Rincón-Mora, “Active capacitor multiplier in Miller-compensated circuits,” IEEE J. Solid-State Circuits, vol. 35, no. 1, Jan. 2000, pp. 26–32.

[3] G. A. Rincón-Mora and P. E. Allen, “A low-voltage, low quiescent current, low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, Jan. 1998, pp. 36–44.

[4] H. Lee and P. K. T. Mok, “Active-feedback frequency compensation technique for low power multistage amplifiers,” IEEE J. Solid-State Circuits, vol. 38, no. 3, Mar. 2003, pp. 511–520.

[5] H.-T. Ng, R. M. Ziazadeh, and D. J. Allstot, “A multistage amplifier technique with embedded frequency compensation,” IEEE J. Solid-State Circuits, vol. 34, Mar. 1999, pp. 339–347.

[6] K. N. Leung, P. K. T. Mok, W. H. Ki, and J. K. O. Sin, “Three-stage large capacitive load amplifier with damping-factor-control frequency compensation,” IEEE J. Solid-State Circuits, vol. 35, Feb.2000, pp. 221–230.