非晶矽薄膜電晶體等效電路模型參數萃取

近年來，隨著電子科技時代的進步，如何降低成本且有效合理的藉由模擬結果預知實際產品特性，已是目前科技業研發部門不可或缺的一門專業知識。在電晶體特性分析裡，電晶體等效模型就是其中一項用來模擬實際產品最簡單的例子，一方面，公司可以省去繁雜的製程步驟快速分析電晶體特性，另一方面，節省了成本的開銷達成Cost Down的目的，以此例延伸於積體電路設計運用，不只加速了設計產業的發展，並提高公司與同業的競爭力。電子產品開發及設計裡，電晶體等效電路模型及其模型參數是積體電路設計與製造的關鍵橋樑，其中，非晶矽(a-Si:H)薄膜電晶體是主動矩陣液晶顯示器(AMLCDs)的重要元件，主要是被應用在液晶顯示器上當開關元件，RPI薄膜電晶體模型(Rensselaer Polytechnic Institute Thin Film Transistor Model)是廣泛被使用在非晶矽薄膜電晶體元件模擬的等效模型，而等效元件模型裡包含許多複雜的製程參數(Model Parameter)，如何有效且準確的得到製程參數並建立Model Card，對液晶顯示器的模擬設計非常重要。在本論文中，我們首先介紹a-Si:H電晶體的製程步驟，並簡介本實驗室所設計的測試電晶體及閘極驅動電路的實際layout及成品，分析a-Si:H元件特性，包含尺寸、溫度及TFT在長時間操作下的電特性變動，以及從元件至電路的應用，中間過程包含RPI Model的介紹及a-Si:H TFT Model Mard之參數萃取，最後進行電路模擬比較。測試電晶體及閘極驅動電路(ASG Circuit)的實際layout及成品，主要是透過與奇美電子的產學合作，由奇美電子提供製程資源。a-Si:H元件特性分析部分，以往的非晶矽薄膜電晶體研究裡，只有針對電晶體尺寸、溫度或者stress效應做個別的分析，但此種分析方法卻缺乏整體性。因此，在本研究裡，我們將三種效應利用臨界電壓的趨勢進行同步分析及整合。參數萃取的部分，本實驗室開發出RPI薄膜電晶體模型的參數萃取器。此萃取器主要分為兩種使用模式，包含手動萃取及自動萃取。手動萃取部分，使用者可以依照本實驗室訂立的萃取基本步驟(包含將線性區、次臨界區、飽和區和漏電流區所對應的參數最佳化)及元件物理定義，選取欲調整的Model Parameters進行調整校估，由於本實驗室對萃取器是採取人性化的視窗設計，在調整Model Parameters同時也可立即觀察到特性曲線的變化，讓使用者可以正確調整出適合的Model Parameters。在此調整過程，我們整合出所有參數對環境因素所對應到的變化趨勢，根據此變化趨勢，我們甚至可以達到預估Model Card及合理預測電路變化的效果。自動萃取部分，使用者可以選取欲調整的I-V特性曲線視窗區域，進行自動調變的功能，而此軟體我們是以數值最佳化李文伯格-馬奎特法(Levenberg-Marquardt Method)進行自動萃取，有效的減少使用者調整的時間，並增加Model Card的準確度。電路模擬的部分，我們採用實際運用在產品上的21.5吋ASG Circuit進行模擬。利用電晶體基本特性及參數萃取器，我們合理的萃取出變溫stress效應下的Model Cards，最後代入ASG Circuit進行電路模擬，準確的推估電路開關速度及功耗。總之，本論文已經將參數萃取器實際的運用在電路的性能校估，成功達到理論與實品的整合，進一步提高了面板產業界IC設計者的競爭力，並達到公司節省成本提高工作效能的目的。

關鍵字

非晶矽薄膜電晶體；製程參數；閘極驅動電路； RPI 薄膜電晶體模型；通道；製程參數檔

並列摘要

Electronic technology has made great progress in recent years. Research and Development (R&D) in the electronics industry cannot afford to overlook the importance of reducing cost as well as predicting product attributes through efficient simulation. In analyzing transistors, the equivalent circuit model is the best way to simulate product attributes. Electronics companies can skip the complicated process and effortlessly acquire transistor properties. On the other hand, it also proves valuable in reducing cost. If applied in designing integrated circuits, the model could contribute to the development of the electronics industries and their competitive edge. The equivalent circuit model of transistors and its model parameter are the key bridge in designing integrated circuits. The Thin-Film Transistor, a-Si:H, is an important component for active-matrix liquid crystal displays. It is used as a switch component in LCDs. The RPI model (Rensselaer Polytechnic Institute Thin Film Transistor Model) is widely used in simulating a-Si:H TFT attributes. An equivalent component model usually contains numerous model parameters. Hence, it is essential to acquire the precise parameters with which to create model cards in designing LCDs. The process steps of a-Si:H TFT are discussed in this essay. We then move on to introducing the testing transistor and the layout of the asynchronous generator circuits we designed in the laboratory. We analyze the device attributes of a-Si:H, including its dimensions, temperature and the varied electrical characteristics of the TFT under long-time operations. We discuss the TFT application in devices and circuits, with the introduction of the RPI model and the parameter extraction of the a-Si:H TFT model card. We work with colleagues from Chi Mei Optoelectronics Corporation in testing transistors and the layout of ASG circuits. It is the company that provides us with the process step resources. The existing literature of the TFT only gives separate accounts to transistors' dimensions, temperature, or stress effect in analyzing the device attributes of a-Si:H, which fails to provide an integral whole. Hence, in this research, we integrate three kinds of transistor effect by analyzing the properties of their threshold voltage. To extract parameters, we develop a parameter extractor for the a-Si:H RPI model. The extractor can be switched between automatic and manual modes. In the manual mode, the lab user can select the ideal model parameters for further adjustment, based on the extraction SOPs and the physical properties of the device (the former including the optimization for the correspondent parameters in the linear region, the sub-threshold region, the saturation region and the leakage region). The extractor is designed to be visual for laboratory purposes. While adjusting the model parameters, the lab can also monitoring their characteristic curves. During the adjusting process, we integrate all parameters corresponding to their external factors, and based on their variables, we can predict model cards and the feasible circuit variations. In the automatic mode, the user can initiate auto-adjustment from the I–V characteristic curve window. The application has been optimized through the Levenberg-Marquardt method, which shortens the extraction time and adds up to the model card accuracy. In simulating, we choose to adopt the ASG circuit in 10.1-inch LCDs, which are products available to the market. After exploiting transistor properties and utilizing the parameter extractor, we are able to acquire the model card from variable temperatures and stress effects. The model card is then used in the ASG circuit to conduct simulations, from which the velocity and the power consumption of the circuit are presented. In summary, the essay has tried to give a full account in combining theories and manufacturing and in applying the parameter extractor to circuit property adjustments. This might be overall contributing to IC designers' competiveness in the industry, as well as reducing cost and enhancing efficiency.

並列關鍵字

amorphous silicon thin film transistor ； model parameter ； gate drive circuit ； rensselaer polytechnic institute thin film transistor model ； channel ； model card

參考文獻

[1] M. S. Shur, H. C. Slade, M. D. Jacunski, A. A. Owusu, and T. Ytterdal, “SPICE Models for Amorphous Silicon and Polysilicon Thin Film Transistors,” J. The Electrochemical Society, vol. 144, no. 8, pp. 2833-2839, 1997.

[2] S. C. Kao, H. W. Zan, J. J. Huang, and B. C. Kung, “Self-Heating Effect on Bias-Stressed Reliability for Low-Temperature a-Si:H TFT on Flexible Substrate,” IEEE Transaction on Electron Devices, vol. 57, no. 3, pp. 588-593,Mar. 2010.

[3] Y. Li, C. H. Hwang, C. L. Chen, S. Yan, J. C. Lou, “UV Illumination Technique for Leakage Current Reduction in a-Si:H Thin-Film Transistors,” IEEE Transaction on Electron Devices, vol. 55, no. 11, pp. 3314, Nov. 2008.

[4] Y. Kaneko, A. Sasano, and T. Tsukada, “Characterization of instability in amorphous silicion thin-film transistors, ”J. Applied Physics, vol. 69, no. 10, pp, 7301-7305, May 1991.

[5] M. J. Powell, S. C. Deane, and W. I. Milne, “Bias‐stress‐induced creation and removal of dangling‐bond states in amorphous silicon thin‐film transistors”, Appl. Phys. Lett., vol. 60, no. 2, pp. 207-209, Jan. 1992.

國際替代計量

非晶矽薄膜電晶體等效電路模型參數萃取

全文下載

主題瀏覽