頻率產生電路之注入鎖定機制強化

Reinforcements of Injection Locking Frequency Generator

高宏瑋(Hong-Wei Kao)

指導教授 ： 吳建華

國立中正大學/工學院/電機工程學系/碩士(2013年)

摘要

此論文研究Ku頻段收發機頻率合成電路所需注入鎖定式振盪器鎖頻範圍提昇之注入設計考量。探討在一定輸出功率及注入鎖定功率要求下，提昇鎖頻範圍及壓低功率消耗。先以電流再利用直接注入鎖定式三倍頻器驗證調整注入電晶體工作模式對鎖頻範圍提升的貢獻。為確認電晶體工作在三極體區能比工作在飽和區得到更多的諧波訊號，文中探討電晶體在各工作模式下的諧波訊號強度。此架構之鎖頻範圍為31%，並在1.2V偏壓狀況下，消耗功率僅3.6毫瓦，輸出功率可達-1dBm。另外，針對三倍頻電路，利用混波器產生三倍頻訊號可壓制基頻和二倍頻的特性，提出以雙推式電路和混頻器架構產生三倍頻訊號，並維持良好諧波抑制的架構。與已發表之注入三倍頻器相較，單一鎖頻範圍約擴展三倍達到23%，此架構完成之鎖頻範圍延伸至36.4%。1.2V偏壓時，消耗功率為5.34毫瓦，輸出功率可達0.32毫瓦。更進一步改變双推式電路工作模式，並精簡其架構為電流再利用。改良後的架構在同樣偏壓條件下消耗功率下降為4.8毫瓦，鎖頻範圍更擴增至42.2%，輸出功率維持一樣毫瓦。在除頻器部分以一双重注入除二電路驗證兩個注入路徑對鎖頻範圍提升的貢獻，注入路徑分別有尾端注入及交互耦合對共節點等兩處。為確保能在低電壓的情況下有效注入，首先探討注入信號彼此間影響程度。並證明在低功耗情況下，双注入對提升鎖頻範圍的重要性。完成之鎖頻範圍可延伸至35%。且在1.2V偏壓狀況下，消耗功率僅0.38毫瓦，輸出功率可達0.2毫瓦。

關鍵字

注入鎖定式振盪器 ； 多重注入 ； 除頻電路 ； 三倍頻器 ； 倍頻電路

並列摘要

For the sake of enhancing the locking range of Ku-band frequency divider and multiplier in the frequency synthesizer. Both of divider and multiplier's locking range, there is a trade-off between output power and power consumption. How to enhance locking range and reduce power consumption for a certain input power and power consumption is the major focus in this study. In order to improve the locking range with proper transistor's working mode, a current-reused directly injection-locked frequency tripler is investigated first. The harmonics’ strength in triode mode are stronger that those of saturation mode. The achieved locking range is 31%, and the output power can reach -1dBm. At 1.2V bias, the power consumption is only 3.6 mW, For the case of tripler circuit, using mixing circuit to generate third harmonic signal can suppress the fundametal and the second harmonic signals at the same. the proposed topology uses a push-push and mixer architecture to generate triple signal with good harmonic suppression. Compared with published data, locking range for fixed Vtune is 23% and the overall locking range can be extended to 36.4%. It's three times larger than other structures. At 1.2V bias voltage, power consumption is 5.34 mW output power up to 0.32 mW. Subsequently, further improvements on the operating mode of push-push oscillator and using current-reused structure make the circuit perform well with lower power consumption. The modified structure takes power consumption only 4.8 milli-watts under the same output power level, and locking range is extend to 42.2%. In the divider section, injections both on the tail transistor and the bottom of cross-couple pair provides more contribution upon the locking range. To ensure that it is effective in case of low-voltage operation, it is clarified first there is no interaction between these two injections, and the way to enhance locking range is proved to be effective in case of low-power consumption. The overall locking rang can be extended to 35%. And at 1.2V bias voltage, power consumption is only 0.38 mW and output power reaches up to 0.2 mW.

並列關鍵字

Injection-Locked Oscillator ； Multi Injection ； Frequency Divider ； Tripler ； Frequency Multiplier

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