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  • 學位論文

以FPGA實現即時心電訊號量測參數分析

Implementation Real-Time ECG Feature Extraction Using FPGA

指導教授 : 胡威志

摘要


本研究目的在於發展一套針對心電訊號處理的演算法以FPGA (Field Programmable Gate Array,現場可程式化邏輯閘陣列)實現的Soc(System on Chip)系統平台,可達到即時偵測並運算心電訊號中正常心律及心律不整發生時的各項參數值。 為達到即時偵測並運算心電訊號參數值的演算過程,本研究建構一個FPGA晶片(EP2C20F484C8) 為核心及其他組件所構成之處理系統,實現完成了心電訊號即時擷取量測參數分析監控系統平台。即時心電訊號擷取、量測、參數分析及監控偵測系統內所有運算模組及周邊裝置LCD、USB、Flash Memory,均由FPGA晶片控制。即時顯示的心電訊號及分析參數資訊由LCD顯示,也可將參數資訊藉由USB通訊傳輸介面傳送到Borland C++ Builder 撰寫視窗化介面程式顯示。 演算法設計驗證以MIT-BIH database上的專家分析判斷與MATLAB上的運算結果及FPGA的硬體運算判斷三者互做比較其誤差值,硬體運算即時分析驗證的平均誤差均在0.02秒內;並即時量測五位受測者的心電訊號各項特徵參數,計算其平均誤差及標準差作為系統測試評估試驗。

關鍵字

心電訊號 FPGA 心率不整 樣本辨識

並列摘要


The objective is to develop an algorithm for processing the electrocardiogram (ECG) signals that will be extracting the ECG features and to implement it using the FPGA as a testing prototype for System on Chip (Soc) design. The algorithm will be analyzing the component of the ECG signals and information in real time and to identify the abnormal rhythm and heart beat. The program controls the detection, analysis and monitoring of the LCD, USB and Flash Memory of the FPGA. Both the ECG signal in real time and the analyzed information can be displayed on the LCD panel. The information can be transmitted and presented using self-developed software that is designed with Borland C++ Builder through USB device. The performance of algorithm was tested using MATLAB and valided based on the MIT-BIH Arrhythmia database which has been annotated by cardiologists. This overall detection tolerance of the algorithm was 0.02 seconds. The prototype system has been tested in real-time. The ECG signals from five volunteers were acquired, tested and analyzed and displayed in on line.

並列關鍵字

FPGA ECG Arrhythmia pattern recognition Algorithm

參考文獻


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