針對覆晶銲錫凸塊的量產製程,尤其晶圓級構裝應用需求,採用湧泉式電鍍技術,本研究探討改良鍍槽設計對銲錫鍍層在整片矽晶圓上厚度分布均勻性的影響。研究方法先利用計算流體力學進行鍍液流場分析,再實際以覆晶製程製作銲錫凸塊下方金屬化層,並利用此改良鍍槽電鍍銲錫,以驗證模擬分析之結果。本研究顯示計算流體力學模擬分析在覆晶銲錫凸塊電鍍製程的應用可行性,此外,也證實了此一改良鍍槽設計對電鍍銲錫層厚度均勻性的優點。
This study explores the effect of a modified design of the electroplating cell on the thickness uniformity of the plated solder layer over the entire surface region of the Si wafer, aiming at mass producing electroplated solder bumps for flip-chip packaging, while offering solutions to specific applications in wafer-level packaging by employing the fountain-type electroplating technique. For this purpose, the flow field of the electroplating fluid is analyzed by applying computational fluid dynamics (CFD). The simulation results are further experimentally confirmed, as under bump metallurgy (UBM) layers are produced, and solder bumping is conducted by utilizing the modified electroplating cell. The study ascertains the applicability of the CFD simulation analysis in the electroplating process for flip-chip solder bumping. Lastly, the study proceeds to verify the merit of the modified electroplating-cell design in thickness uniformity of the electroplated solder layer.