多層印刷電路板製程中組裝與加工次序之整合分析與評估

Analysis and Evaluation of Integrated Machining and Assembly Sequences of Fabrication of Multilayer Printed Circuit Board

李炎燊(Yan-Shen Li)

指導教授 ： 鄭元杰 博士

元智大學/工程學院/工業工程與管理學系/碩士(1997年)

摘要

組裝次序是將加工完的元件依指定的組裝次序去組裝成組件。工業界有許多成品必須對元件組裝或加工後的半成品再加工或組裝，而組裝次序與加工次序的評估必須在設計及製程規劃時予以整合，本研究所要探討的即是多層印刷電路板製程中組裝與加工次序之整合分析與評估。隨著印刷電路板的多層化及小型化發展趨勢，其前製程之組裝與加工次序問題會越來越複雜。以多層盲導孔印刷電路板的前製程為例，其元件有基板、導體層、黏接層、全通孔、盲導孔等，組裝製程有壓合、電解或非電解鍍銅、製作乾膜製程，加工製程有鑽孔、印像顯影、去除乾膜、蝕刻、去錫鉛製程，當組裝次序與加工次序的順序混和在一起時，造成組裝與加工次序的不同，進而影響到電路板的生產成本，因此有必要做整合分析評估。
本研究使用增層分析法，輸入多層印刷電路板的盲導孔特徵，利用圖基法建立組裝加工結構網圖(Assembly Machining Structure Network , AMSN)，並依修正規則(Graph Modification Rules)及在先關係(Precedence)計算網圖內之可行組裝與加工次序，再以階層組裝加工次序樹(Hierarchical Assembly Machining Sequence Tree , HAMST)記錄所有可行組裝與加工次序。本研究並提出一綜合成本評估指標分析可行組裝與加工次序的成本，並結合分枝界限法(Branch and Bound Method)減少計算時間及次數，快速求出一組成品的最低總成本之組裝與加工次序，達成製程整合規畫之目標。本研究利用Borland C++軟體，發展一套增層分析法程式軟體系統，並以三個範例成品，來驗證本研究增層分析法之正確與可行性。

關鍵字

多層印刷電路板 ； 組裝次序 ； 加工次序 ； 盲導孔

並列摘要

Assembly process is that machined parts will be assembled to a product by designated assembly sequences. In industries , parts must be machined and assembled to form sub-assembly which makes up a product , and the evaluation of assembly and machining sequences must be integrated before the product design and manufacturing plan. With the trend of multilayer and minimization of printed circuit boards , the problem of sequences will be more complicated .For example of PCB with blind via holes ,the parts include copper claded lamination ,etched-copper panels , prepreg layer, through hole and blind via hole, assembly process includes lamination , electolitic or electroless copper plating , photoresist laminating , and machining process include drilling ,tin-lead alloy removal ,etching, photoresist exposure and removal . Because assembly and machining sequence are mixed together , the differentiation of sequences will influence the production cost. And the sequential problem must be analyzed and evaluated by integrated views.
In this research project, build-up analysis method will be based on graph-base method and developed by inputting blind-via-hole features which construct Assembly Machining Structure Network. After calculating feasible assembly and machining sequences by Graph Modification Rules and precedence constraints , Hierarchical Assembly Machining Sequence Tree records the feasible solution . This study also utilizes the branch and bound method with cost indices which considers a minimum cost direction to reduce calculating time and iteration and to find the best solution of the lowest cost , and achieves the goal of integration of manufacturing planning. The developed methodology will be implemented on a personal computer with Borland C++ software . Three example will be tested to verify the correctness and feasibility of build-up analysis method .

並列關鍵字

multilayer printed circuit board ； assembly sequence ； machining sequence ； blind via hole

參考文獻

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