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  • 學位論文

應用於腎結石復發預防之多參數尿液檢測SoC設計

Multi-Parameter System-on-a-Chip (SoC) Design for the Prevention of Urolithiasis Recurrence

指導教授 : 鍾文耀

摘要


根據多項研究指出,罹患尿路結石的因素有很多,如人因遺傳、生活習慣、季節和職業等皆會導致,且復發率高,若患者能夠透過尿液參數檢測來控制飲食及生活習慣,可降低復發機率及不必要的花費。 本研究針對尿液檢測應用於尿路結石復發預防,利用商用元件及微控器實現系統原型機,實現酸鹼值與尿導電度量測功能,且針對鈣離子及尿酸之讀出電路進行驗證,積體電路部分,目前已透過TSMC 0.18μm Mixed-Signal 1P6M Technology實現晶片,後段數位電路對ADC轉換後之數位信號進行處理,控制之ADC為ADS7841,其ADC架構為12bits SAR ADC,系統量測機制可分為量測模式及校正模式,在酸鹼值參數方面,校正方式為兩點校正法(pH4、pH7)計算量測線性,並將線性之斜率與截距儲存於暫存器內,使系統在量測模式可透過儲存於暫存器之線性參數計算濃度,本設計經Altera FPGA DE0開發板驗證成功,透過TSMC 0.18μm實現晶片,全晶片操作頻率達到2 MHz,功率耗損為0.9 mW,而面積約0.66 mm2。

並列摘要


According to research, there are many reasons that cause urolithiasis, such as genetic, lifestyle, season and occupation etc. Moreover, the recurrence rate is very high. In order to reduce the medical expenses of the patients, it’s necessary to design a device for the prevention of urolithiasis recurrence. The research aims to design a device for the prevention of urolithiasis recurrence. We used commercial components and microcontroller to implement the prototype. The device can detect the pH and urine conductivity. Moreover, we verified the measurement of calcium and uric acid using our designed readout circuit. For VLSI chip implementation, we used the TSMC 0.18μm Mixed-Signal 1P6M Technology. The digital back-end ASIC processes the digital signal from the ADC; the ADC used is ADS7841 which has 12 bits of resolution and has the Successive Approximation Register (SAR) architecture. The system measurement mechanism consists of calibration mode and measurement mode. In pH calibration mode, we used two points (pH4, pH7) to interpolate the unknown pH value by extracting the slope and intercept that are stored into the registers. In the measurement mode, the system will compute the concentration of the parameter through the stored slope and intercept. The design used Altera DE0 board to verify the functionality, and used TSMC 0.18μm to implement the chip. The tapeout chip operates with a clock frequency of 2 MHz, while dissipating 0.9 mW of power. The chip area is 0.66 mm2.

參考文獻


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