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  • 學位論文

以SiGe製程實現新型負微分電阻元件與應用積體電路之設計

Design and Fabrication of New-Type Negative Differential Resistance Devices and Applied Integrated Circuits by SiGe Process

指導教授 : 甘廣宙
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摘要


一般學界所謂的負微分電阻元件(Negative Differential Resistance, NDR),指的是共振穿透二極體(RTD),它是以化合物半導體製作而成,如砷化鎵(GaAs)、磷化銦(InP)材料製作,其材料有高電子移動率等優點。目前負微分電阻元件,已被應用於一些電路設計上。 我們藉由適當設計MOS元件的寬度、長度參數(Width / Length),並控制其雙端電源電壓的大小,我們可得到不同的峰值(peak)與谷值(valley)的電流-電壓特性曲線,所以此元件具有極廣大範圍的調變特性,對於其應用電路的設計與開發,深具研究價值。而此元件最大的優點在於,我們可與國家晶片系統設計中心(CIC)所提供的製程相配合,能使此負微分電阻元件與應用電路相整合於同一矽(Silicon)晶片上,達到積體電路化(IC)與系統晶片化(SoC)的目標。 藉由上述我們利用負微分電阻元件設計出邏輯閘電路、振盪器電路、倍頻器與除頻器電路及離散時間細胞式類神經網路電路。

並列摘要


Comparing to conventional NDR device such as resonant-tunneling-diode (RTD) device, it is fabricated by the technique of compound semiconductor. However in our work, the NDR device is consisted of three NMOS and one PMOS devices, so we can fabricate this device by the standard CMOS process. The multiple-peak NDR devices provide a good opportunity to implement functional circuit, for multiple-valued logic and memory application, with reduced complexity. Numerous applications create the multiple-peak I-V characteristics with two or more NDR devices connected in series. Therefore, we had fabricated the two-peak and three-peak MOS-NDR devices by the standard 0.35μm CMOS process. So, we have designed Logic circuit, Oscillator, Frequency Multiplier, Frequency Divider and DT-CNN by using Negative Differential Resistance.

參考文獻


[1]W. Williamson, III, S. B. Enquist, D. H. Chow, H. L. Dunlap, S. Subramaniam, P. Lei, G. H. Bernstein, and B. K. Gilbert, “12 GHz clocked operation of ultralow power interband resonant tunneling diode pipelined logic gates,” IEEE J. Solid-State Circuits, vol. 32, pp. 222-230, 1997.
[2]T. Waho, K. Hattori, and Y. Takamatsu, “Flash analog-to-digital converter using resonant-tunneling multiple-valued circuits,” IEEE 0-7695-1083-3/01, pp. 94-99, 2001.
[3]S. J. Wei, H. C. Lin, R. C. Potter, and D. Shupe, “A self-latching A/D converter using resonant tunneling diodes,” IEEE J. Solid-State Circuits, vol. 28, pp. 697–700, June. 1993.
[4]A. F. Gonzalez and P. Mazumder, “Multiple-valued signed-digit adder using negative differential-resistance devices” IEEE Trans. Comput, vol. 47, pp. 947-959, Sept. 1998.
[5]M. Reddy, R. Y. Yu, H. Kroemer, “Bias Stabilization for Resonant Tunnel Diode Oscillators,” IEEE Microwave and Guided Wave Lett., vol. 5, pp. 219-221, July 1995.

被引用紀錄


陳彥汶(2010)。可任意控制輸出之多值邏輯電路設計〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://doi.org/10.6828/KSU.2010.00090
洪士勛(2007)。新型的NDR元件之設計與應用〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0025-0306200810430225
劉士豪(2008)。將MOS-HBT-NDR電路應用在數位與類比電路之研究〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0025-0106200809214300
李昱寬(2009)。利用BiCMOS製程與負微分電阻電路設計邏輯電路和除頻器〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0025-2607200922530100

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