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  • 學位論文

使用矩形共振器架構於耦合線間改善遠端串音干擾與信號時序抖動

The Improvement of Far-End Crosstalk and Timing Jitter for Coupled Microstrip Line by Using Rectangular Resonators

指導教授 : 林丁丙

摘要


在現代數位資料傳輸當中,串音干擾是一個主要影響信號完整性的雜訊來源;一般串音干擾可以在侵略者線與受干擾線間加入有短路貫穿孔的防護線來降低;然而,短路貫穿孔在防護線上面時,在於頻率領域中會造成共振,在時間領域中會造成振鈴雜訊,因此我們提出使用步階式防護線的設計,藉以增加防護線與信號線間的電容耦合,我們的方法可以提供最少的貫穿孔使用數量以提昇電路佈線的彈性以及降低振鈴雜訊的產生;根據實驗的結果指出使用步階式防護線跟沒有防護線的案例比較在時間領域中,近、遠端串音干擾分別減少34%與26%。在平行終端介面中,遠端串音干擾因為發生在接收端,比起近端串音干擾將更嚴重的影響到信號完整性;根據使用大量的短路貫穿孔與電阻將會降低電路佈線的彈性且增加成本,我們提出使用矩形共振器架構的方法改善遠端串音干擾與信號時序抖動的問題;此方法不需使用短路貫穿孔或電阻即可降低遠端串音干擾與信號時序抖動;根據實驗的結果指出使用矩形共振器架構跟沒有防護線的案例比較在時間領域中,遠端串音干擾與信號時序抖動分別減少57%與18%;由實驗結果證明,我們所提出的矩形共振器架構不但擁有較佳的效能,而且還不需使用額外的元件,如終端電阻或短路串穿孔,即可達到雜訊抑制的效果,因此我們的方法適合在實際工程應用上使用。

並列摘要


In the modern generation of digital data transmission, crosstalk is one major source of noise to interfere with signal integrity (SI). Generally, crosstalk can be reduced by adding a guard trace with shorting-vias between the victim and aggressor areas of the circuit. However, the shorting-vias in the guard trace induced the resonance in the frequency domain and the ringing noise in the time domain. We propsed the step guard trace to compensate capacitive coupling between the guard trace and signal trace. Our method offers minumum number of shorting-vias to increase the flexibility on the circuit routing and decrease the ringing noise. The experimental results indicated that the step gaurd trace could reduce near-end crosstalk (NEXT) and far-end crosstalk (FEXT) by 34% and 26% compared to without guard trace in the time domain, respectively. Therefore, in a parallel-terminated interface, the FEXT is more problematic than NEXT since it seriously affects the SI at the receiver side. Since a large number of shorting-vias and resistances reduce the flexibility of the circuit routing and increase cost, we propose a method to reduce the FEXT and timing jitter by using rectangular resonators (RRs) structure. In which, the shorting-via and resistance are not necessary to be used for improving the FEXT and timing jitter. The experimental results indicated that the RRs structure could reduce FEXT and timing jitter by 57% and 18% compared to without guard trace in the time domain, respectively. These experimental results confirmed that our proposed RRs structure not only shows better performance than the alternatives, but also no requires extra components such as terminating resistors or shorting-vias to reduce noise significantly. Accordingly, the new concept and method might be approached to the practical engineering.

參考文獻


[22] 趙嘉瀅,使用接地防護線降低串音雜訊,碩士論文,國立台灣大學,台北,2007。
[2] G. H. Shiue, C. Y. Chao, R. B. Wu, “Guard Trace Design for Improvement on Transient Waveforms and Eye Diagrams of Serpentine Delay Lines,” IEEE Trans. Adv. Packag., vol. 33, no. 4, pp. 1051-1060, Nov. 2010.
[3] B. D. Jarvis, “The effects of interconnections on high-speed logic circuits,” IEEE Trans. Electron. Comput., vol. 12, no. 5, pp. 476-487, Oct. 1963.
[4] T. R. Gazizov, “Far-end crosstalk reduction in double-layered dielectric interconnects,” IEEE Trans. Electromagn. Compat., vol. 43, no. 4, pp. 566-572, Nov. 2001.
[6] I. Novak, B. Eged, and L. Hatvani, “Measurement by vector-network analyzer and simulation of crosstalk reduction on printed circuit boards with additional center traces,” in Proc. Instrumentation Measurement Technol. Conf., Irvine, CA, May 1993, pp. 269-274.

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